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CMSIS2000
0.0.7
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CMSIS2000
0.0.7
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 Sources from NXP | |
  Examples from NXP | |
  DAC_Examples | |
| iArch platform independent macroses. | Macroses and some documentation presented for different CPU and MCU |
 Generic empty PORT | Architecture dependent OS API description only implemented |
| POSIX | POSIX port documentation |
| WINNT | WINDOWS port documentation |
| AVR RISC CPU | AVR core port documentation |
| ARM RISC CPU (ARM7) | ARM7 core port documentation |
| LPC2xxx family (NXP) | LPC2xxx from NXP(Philips) family port documentation |
| Atmel ARM7 RISC CPUs (ARM7) | Atmel.. |
| Interrupt macroses | Arch independent interrupt and exceptions handlers declaration and creation |
| Board specific support packages (BSP) | There is must be three defines in project i_ARCH, i_MCU_FAMILY, i_MCU_MODEL |
| Boards for MCU LPC2xxx series(BSP) | |
| Embedded Artist LPC2478 board | EA_v1_1 board definition |
| LPC2xxx generic board | LPC2xxx generic board definition |
| Boards for MCU LPC17xx series(BSP) | |
| LPC17xx board | EA_v1_1 board definition |
| LPC17xx generic board | LPC17xx generic board definition |
| Olimex LPC1766-STK board | LPC1766-STK board definition |
| Starterkit SK-MLPC1768 board | SK-MLPC1768 board definition |
| Boards for AVR RISC 8bit series(BSP) | |
| AVR generic board | AVR generic board definition |
| CMSIS original documentation | |
| CMSIS DSP Software Library Fucntions | |
| Basic Math Functions | |
| Fast Math Functions | This set of functions provides a fast approximation to sine, cosine, and square root |
| Square Root | Computes the square root of a number |
| Complex Math Functions | This set of functions operates on complex data vectors |
| Filtering Functions | |
| Matrix Functions | This set of functions provides basic matrix math operations |
| Transform Functions | |
| Controller Functions | |
| PID Motor Control | A Proportional Integral Derivative (PID) controller is a generic feedback control loop mechanism widely used in industrial control systems |
| Vector Clarke Transform | Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector |
| Vector Inverse Clarke Transform | Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases |
| Vector Park Transform | Forward Park transform converts the input two-coordinate vector to flux and torque components |
| Vector Inverse Park transform | Inverse Park transform converts the input flux and torque components to two-coordinate vector |
| Statistics Functions | |
| Support Functions | |
| Interpolation Functions | These functions perform 1- and 2-dimensional interpolation of data |
| Linear Interpolation | Linear interpolation is a method of curve fitting using linear polynomials |
| Bilinear Interpolation | Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid |
| Examples | |
| CMSIS Core Lint Configuration | List of Lint messages which will be suppressed and not shown: |
| CMSIS SIMD Intrinsics | Access to dedicated SIMD instructions |
| CMSIS Core Instruction Interface | Access to dedicated instructions |
| CMSIS Global Defines | IO Type Qualifiers are used |
| Defines and Type Definitions | Type definitions and defines for Cortex-M processor based devices |
| Status and Control Registers | Core Register type definitions |
| Nested Vectored Interrupt Controller (NVIC) | Type definitions for the NVIC Registers |
| System Control Block (SCB) | Type definitions for the System Control Block Registers |
| System Tick Timer (SysTick) | Type definitions for the System Timer Registers |
| Core Debug Registers (CoreDebug) | Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor |
| Core Definitions | Definitions for base addresses, unions, and structures |
| System Controls not in SCB (SCnSCB) | Type definitions for the System Control and ID Register not in the SCB |
| Instrumentation Trace Macrocell (ITM) | Type definitions for the Instrumentation Trace Macrocell (ITM) |
| Data Watchpoint and Trace (DWT) | Type definitions for the Data Watchpoint and Trace (DWT) |
| Trace Port Interface (TPI) | Type definitions for the Trace Port Interface (TPI) |
| Functions and Instructions Reference | |
| CMSIS Core Register Access Functions | |
| NVIC Functions | Functions that manage interrupts and exceptions via the NVIC |
| SysTick Functions | Functions that configure the System |
| ITM Functions | Functions that access the ITM debug interface |
| Need to be done. | |
| LPC17xx_System | |
| LPC17xx System Defines | |
| LPC17xx System Public Variables | |
| LPC17xx System Public Functions | |
| LPC2xxx System | |
| APB(ARM Peripheral Bus) peripheries registers addresses | |
| LPC2xxx System etc periphirals | NXP PLCK divider NXP PCLK Peripheral Clock devider -> PLCK divider (VPB bus clock dividers) Bit1 Bit0 Description 0 0 cclk/4 (1/4 From CPU CLOCK) 0 1 cclk/1 (No division) 1 0 cclk/2 (1/2 From CPU CLOCK) 1 1 cclk/6 or cclk/8 |
| CMSIS Core Definitions for LPC2xxx | This file defines all structures and symbols for CMSIS core: |
| LPC2xxx IRQ Numbers | |
| APB(ARM Peripheral Bus) peripheries base addresses | |
| OLD Sources from NXP | |
| APB(ARM Peripheral Bus) peripheries registers addresses | |
| STM32F10x_StdPeriph_Examples | |
| USART_Interrupt |
1.8.1.2 
