CMSIS2000
0.0.7
|
Data Structures | |
struct | vicRegs_t |
Macros | |
#define | AD0CR (*(REG32*)(LPC_AD0_BASE + 0x00)) |
#define | AD0DR0 (*(REG32*)(LPC_AD0_BASE + 0x10)) |
#define | AD0DR1 (*(REG32*)(LPC_AD0_BASE + 0x14)) |
#define | AD0DR2 (*(REG32*)(LPC_AD0_BASE + 0x18)) |
#define | AD0DR3 (*(REG32*)(LPC_AD0_BASE + 0x1C)) |
#define | AD0DR4 (*(REG32*)(LPC_AD0_BASE + 0x20)) |
#define | AD0DR5 (*(REG32*)(LPC_AD0_BASE + 0x24)) |
#define | AD0DR6 (*(REG32*)(LPC_AD0_BASE + 0x28)) |
#define | AD0DR7 (*(REG32*)(LPC_AD0_BASE + 0x2C)) |
#define | AD0GDR (*(REG32*)(LPC_AD0_BASE + 0x04)) |
#define | AD0INTEN (*(REG32*)(LPC_AD0_BASE + 0x0C)) |
#define | AD0STAT (*(REG32*)(LPC_AD0_BASE + 0x30)) |
#define | AHBCFG1 (*(REG32*)(SCB_BASE + 0x188)) |
#define | AHBCFG2 (*(REG32*)(SCB_BASE + 0x18C)) |
#define | APBDIV (*(REG32*)(SCB_BASE + 0x100)) |
#define | CAN1BTR (*(REG32 *)(LPC_CAN1_BASE + 0x14)) |
#define | CAN1CMR (*(REG32 *)(LPC_CAN1_BASE + 0x04)) |
#define | CAN1EWL (*(REG32 *)(LPC_CAN1_BASE + 0x18)) |
#define | CAN1GSR (*(REG32 *)(LPC_CAN1_BASE + 0x08)) |
#define | CAN1ICR (*(REG32 *)(LPC_CAN1_BASE + 0x0C)) |
#define | CAN1IER (*(REG32 *)(LPC_CAN1_BASE + 0x10)) |
#define | CAN1MOD (*(REG32 *)(LPC_CAN1_BASE + 0x00)) |
#define | CAN1RDA (*(REG32 *)(LPC_CAN1_BASE + 0x28)) |
#define | CAN1RDB (*(REG32 *)(LPC_CAN1_BASE + 0x2C)) |
#define | CAN1RFS (*(REG32 *)(LPC_CAN1_BASE + 0x20)) |
#define | CAN1RID (*(REG32 *)(LPC_CAN1_BASE + 0x24)) |
#define | CAN1SR (*(REG32 *)(LPC_CAN1_BASE + 0x1C)) |
#define | CAN1TDA1 (*(REG32 *)(LPC_CAN1_BASE + 0x38)) |
#define | CAN1TDA2 (*(REG32 *)(LPC_CAN1_BASE + 0x48)) |
#define | CAN1TDA3 (*(REG32 *)(LPC_CAN1_BASE + 0x58)) |
#define | CAN1TDB1 (*(REG32 *)(LPC_CAN1_BASE + 0x3C)) |
#define | CAN1TDB2 (*(REG32 *)(LPC_CAN1_BASE + 0x4C)) |
#define | CAN1TDB3 (*(REG32 *)(LPC_CAN1_BASE + 0x5C)) |
#define | CAN1TFI1 (*(REG32 *)(LPC_CAN1_BASE + 0x30)) |
#define | CAN1TFI2 (*(REG32 *)(LPC_CAN1_BASE + 0x40)) |
#define | CAN1TFI3 (*(REG32 *)(LPC_CAN1_BASE + 0x50)) |
#define | CAN1TID1 (*(REG32 *)(LPC_CAN1_BASE + 0x34)) |
#define | CAN1TID2 (*(REG32 *)(LPC_CAN1_BASE + 0x44)) |
#define | CAN1TID3 (*(REG32 *)(LPC_CAN1_BASE + 0x54)) |
#define | CAN2BTR (*(REG32 *)(LPC_CAN2_BASE + 0x14)) |
#define | CAN2CMR (*(REG32 *)(LPC_CAN2_BASE + 0x04)) |
#define | CAN2EWL (*(REG32 *)(LPC_CAN2_BASE + 0x18)) |
#define | CAN2GSR (*(REG32 *)(LPC_CAN2_BASE + 0x08)) |
#define | CAN2ICR (*(REG32 *)(LPC_CAN2_BASE + 0x0C)) |
#define | CAN2IER (*(REG32 *)(LPC_CAN2_BASE + 0x10)) |
#define | CAN2MOD (*(REG32 *)(LPC_CAN2_BASE + 0x00)) |
#define | CAN2RDA (*(REG32 *)(LPC_CAN2_BASE + 0x28)) |
#define | CAN2RDB (*(REG32 *)(LPC_CAN2_BASE + 0x2C)) |
#define | CAN2RFS (*(REG32 *)(LPC_CAN2_BASE + 0x20)) |
#define | CAN2RID (*(REG32 *)(LPC_CAN2_BASE + 0x24)) |
#define | CAN2SR (*(REG32 *)(LPC_CAN2_BASE + 0x1C)) |
#define | CAN2TDA1 (*(REG32 *)(LPC_CAN2_BASE + 0x38)) |
#define | CAN2TDA2 (*(REG32 *)(LPC_CAN2_BASE + 0x48)) |
#define | CAN2TDA3 (*(REG32 *)(LPC_CAN2_BASE + 0x58)) |
#define | CAN2TDB1 (*(REG32 *)(LPC_CAN2_BASE + 0x3C)) |
#define | CAN2TDB2 (*(REG32 *)(LPC_CAN2_BASE + 0x4C)) |
#define | CAN2TDB3 (*(REG32 *)(LPC_CAN2_BASE + 0x5C)) |
#define | CAN2TFI1 (*(REG32 *)(LPC_CAN2_BASE + 0x30)) |
#define | CAN2TFI2 (*(REG32 *)(LPC_CAN2_BASE + 0x40)) |
#define | CAN2TFI3 (*(REG32 *)(LPC_CAN2_BASE + 0x50)) |
#define | CAN2TID1 (*(REG32 *)(LPC_CAN2_BASE + 0x34)) |
#define | CAN2TID2 (*(REG32 *)(LPC_CAN2_BASE + 0x44)) |
#define | CAN2TID3 (*(REG32 *)(LPC_CAN2_BASE + 0x54)) |
#define | CAN_AFMR (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x00)) |
#define | CAN_EFF_GRP_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x10)) |
#define | CAN_EFF_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x0C)) |
#define | CAN_EOT (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x14)) |
#define | CAN_LUT_ERR (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x1C)) |
#define | CAN_LUT_ERR_ADR (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x18)) |
#define | CAN_MSR (*(REG32 *)(LPC_CAN_CENTRAL_BASE + 0x08)) |
#define | CAN_RX_SR (*(REG32 *)(LPC_CAN_CENTRAL_BASE + 0x04)) |
#define | CAN_SFF_GRP_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x08)) |
#define | CAN_SFF_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x04)) |
#define | CAN_TX_SR (*(REG32 *)(LPC_CAN_CENTRAL_BASE + 0x00)) |
#define | CCLKCFG (*(REG32*)(SCB_BASE + 0x104)) |
#define | CCR_Off 0x28 |
#define | CLKSRCSEL (*(REG32*)(SCB_BASE + 0x10C)) |
#define | CMD_CODE (*(REG32*)(USB_BASE + 0x10)) |
#define | CMD_DATA (*(REG32*)(USB_BASE + 0x14)) |
#define | CR0_Off 0x2C |
#define | CR1_Off 0x30 |
#define | CR2_Off 0x34 |
#define | CR3_Off 0x38 |
#define | CSPR (*(REG32*)(SCB_BASE + 0x184)) |
#define | CTCR_Off 0x70 |
#define | DACR (*(REG32*)(LPC_DAC_BASE + 0x0)) |
#define | DEV_INT_CLR (*(REG32*)(USB_BASE + 0x08)) |
#define | DEV_INT_EN (*(REG32*)(USB_BASE + 0x04)) |
#define | DEV_INT_PRIO (*(REG32*)(USB_BASE + 0x2C)) |
#define | DEV_INT_SET (*(REG32*)(USB_BASE + 0x0C)) |
#define | DEV_INT_STAT (*(REG32*)(USB_BASE + 0x00)) |
#define | DMA_INT_EN (*(REG32*)(USB_BASE + 0x94)) |
#define | DMA_INT_STAT (*(REG32*)(USB_BASE + 0x90)) |
#define | DMA_REQ_CLR (*(REG32*)(USB_BASE + 0x54)) |
#define | DMA_REQ_SET (*(REG32*)(USB_BASE + 0x58)) |
#define | DMA_REQ_STAT (*(REG32*)(USB_BASE + 0x50)) |
#define | EMC_CONFIG (*(REG32 *)(LPC_EMC_BASE + 0x008)) |
#define | EMC_CTRL (*(REG32 *)(LPC_EMC_BASE + 0x000)) |
#define | EMC_DYN_APR (*(REG32 *)(LPC_EMC_BASE + 0x03C)) |
#define | EMC_DYN_CFG0 (*(REG32 *)(LPC_EMC_BASE + 0x100)) |
#define | EMC_DYN_CFG1 (*(REG32 *)(LPC_EMC_BASE + 0x140)) |
#define | EMC_DYN_CFG2 (*(REG32 *)(LPC_EMC_BASE + 0x160)) |
#define | EMC_DYN_CFG3 (*(REG32 *)(LPC_EMC_BASE + 0x180)) |
#define | EMC_DYN_CTRL (*(REG32 *)(LPC_EMC_BASE + 0x020)) |
#define | EMC_DYN_DAL (*(REG32 *)(LPC_EMC_BASE + 0x040)) |
#define | EMC_DYN_MRD (*(REG32 *)(LPC_EMC_BASE + 0x058)) |
#define | EMC_DYN_RAS (*(REG32 *)(LPC_EMC_BASE + 0x034)) |
#define | EMC_DYN_RASCAS0 (*(REG32 *)(LPC_EMC_BASE + 0x104)) |
#define | EMC_DYN_RASCAS1 (*(REG32 *)(LPC_EMC_BASE + 0x144)) |
#define | EMC_DYN_RASCAS2 (*(REG32 *)(LPC_EMC_BASE + 0x164)) |
#define | EMC_DYN_RASCAS3 (*(REG32 *)(LPC_EMC_BASE + 0x184)) |
#define | EMC_DYN_RC (*(REG32 *)(LPC_EMC_BASE + 0x048)) |
#define | EMC_DYN_RD_CFG (*(REG32 *)(LPC_EMC_BASE + 0x028)) |
#define | EMC_DYN_RFC (*(REG32 *)(LPC_EMC_BASE + 0x04C)) |
#define | EMC_DYN_RFSH (*(REG32 *)(LPC_EMC_BASE + 0x024)) |
#define | EMC_DYN_RP (*(REG32 *)(LPC_EMC_BASE + 0x030)) |
#define | EMC_DYN_RRD (*(REG32 *)(LPC_EMC_BASE + 0x054)) |
#define | EMC_DYN_SREX (*(REG32 *)(LPC_EMC_BASE + 0x038)) |
#define | EMC_DYN_WR (*(REG32 *)(LPC_EMC_BASE + 0x044)) |
#define | EMC_DYN_XSR (*(REG32 *)(LPC_EMC_BASE + 0x050)) |
#define | EMC_STAT (*(REG32 *)(LPC_EMC_BASE + 0x004)) |
#define | EMR_Off 0x3C |
#define | EOT_INT_CLR (*(REG32*)(USB_BASE + 0xA4)) |
#define | EOT_INT_SET (*(REG32*)(USB_BASE + 0xA8)) |
#define | EOT_INT_STAT (*(REG32*)(USB_BASE + 0xA0)) |
#define | EP_DMA_DIS (*(REG32*)(USB_BASE + 0x8C)) |
#define | EP_DMA_EN (*(REG32*)(USB_BASE + 0x88)) |
#define | EP_DMA_STAT (*(REG32*)(USB_BASE + 0x84)) |
#define | EP_INDEX (*(REG32*)(USB_BASE + 0x48)) |
#define | EP_INT_CLR (*(REG32*)(USB_BASE + 0x38)) |
#define | EP_INT_EN (*(REG32*)(USB_BASE + 0x34)) |
#define | EP_INT_PRIO (*(REG32*)(USB_BASE + 0x40)) |
#define | EP_INT_SET (*(REG32*)(USB_BASE + 0x3C)) |
#define | EP_INT_STAT (*(REG32*)(USB_BASE + 0x30)) |
#define | EXTINT (*(REG32*)(SCB_BASE + 0x140)) |
#define | EXTMODE (*(REG32*)(SCB_BASE + 0x148)) |
#define | EXTPOLAR (*(REG32*)(SCB_BASE + 0x14C)) |
#define | FCANIC0 (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x24)) |
#define | FCANIC1 (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x28)) |
#define | FCANIE (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x20)) |
#define | FIO0CLR FIOREG_BASE_ADDR_n(0,0x1C) |
#define | FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x1C)) |
#define | FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x1D)) |
#define | FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x1E)) |
#define | FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x1F)) |
#define | FIO0CLRU (*(volatile unsigned short *)(FIO_BASE + 0x1E)) |
#define | FIO0DIR FIOREG_BASE_ADDR_n(0,0) |
#define | FIO0DIR0 FIOREG_BASE_ADDR_n8(0,0) |
#define | FIO0DIR1 FIOREG_BASE_ADDR_n8(0,1) |
#define | FIO0DIR2 FIOREG_BASE_ADDR_n8(0,2) |
#define | FIO0DIR3 FIOREG_BASE_ADDR_n8(0,3) |
#define | FIO0DIRL FIOREG_BASE_ADDR_n16(0,0) |
#define | FIO0DIRU FIOREG_BASE_ADDR_n16(0,2) |
#define | FIO0MASK FIOREG_BASE_ADDR_n(0,0x10) |
#define | FIO0MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(0,0) |
#define | FIO0MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(0,1) |
#define | FIO0MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(0,2) |
#define | FIO0MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(0,3) |
#define | FIO0MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(0) |
#define | FIO0MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(0) |
#define | FIO0PIN FIOREG_BASE_ADDR_n(0,0x14) |
#define | FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x14)) |
#define | FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x15)) |
#define | FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x16)) |
#define | FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x17)) |
#define | FIO0PINL (*(volatile unsigned short *)(FIO_BASE + 0x14)) |
#define | FIO0PINU (*(volatile unsigned short *)(FIO_BASE + 0x16)) |
#define | FIO0SET FIOREG_BASE_ADDR_n(0,0x18) |
#define | FIO0SET0 (*(volatile unsigned char *)(FIO_BASE + 0x18)) |
#define | FIO0SET1 (*(volatile unsigned char *)(FIO_BASE + 0x19)) |
#define | FIO0SET2 (*(volatile unsigned char *)(FIO_BASE + 0x1A)) |
#define | FIO0SET3 (*(volatile unsigned char *)(FIO_BASE + 0x1B)) |
#define | FIO0SETL (*(volatile unsigned short *)(FIO_BASE + 0x18)) |
#define | FIO0SETU (*(volatile unsigned short *)(FIO_BASE + 0x1A)) |
#define | FIO1CLR FIOREG_BASE_ADDR_n(1,0x1C) |
#define | FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x3C)) |
#define | FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x2D)) |
#define | FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x3E)) |
#define | FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x3F)) |
#define | FIO1CLRU (*(volatile unsigned short *)(FIO_BASE + 0x3E)) |
#define | FIO1DIR FIOREG_BASE_ADDR_n(1,0) |
#define | FIO1DIR0 FIOREG_BASE_ADDR_n8(1,0) |
#define | FIO1DIR1 FIOREG_BASE_ADDR_n8(1,1) |
#define | FIO1DIR2 FIOREG_BASE_ADDR_n8(1,2) |
#define | FIO1DIR3 FIOREG_BASE_ADDR_n8(1,3) |
#define | FIO1DIRL FIOREG_BASE_ADDR_n16(1,0) |
#define | FIO1DIRU FIOREG_BASE_ADDR_n16(1,2) |
#define | FIO1MASK FIOREG_BASE_ADDR_n(1,0x10) |
#define | FIO1MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(1,0) |
#define | FIO1MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(1,1) |
#define | FIO1MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(1,2) |
#define | FIO1MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(1,3) |
#define | FIO1MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(1) |
#define | FIO1MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(1) |
#define | FIO1PIN FIOREG_BASE_ADDR_n(1,0x14) |
#define | FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x34)) |
#define | FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x35)) |
#define | FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x36)) |
#define | FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x37)) |
#define | FIO1PINL (*(volatile unsigned short *)(FIO_BASE + 0x34)) |
#define | FIO1PINU (*(volatile unsigned short *)(FIO_BASE + 0x36)) |
#define | FIO1SET FIOREG_BASE_ADDR_n(1,0x18) |
#define | FIO1SET0 (*(volatile unsigned char *)(FIO_BASE + 0x38)) |
#define | FIO1SET1 (*(volatile unsigned char *)(FIO_BASE + 0x29)) |
#define | FIO1SET2 (*(volatile unsigned char *)(FIO_BASE + 0x3A)) |
#define | FIO1SET3 (*(volatile unsigned char *)(FIO_BASE + 0x3B)) |
#define | FIO1SETL (*(volatile unsigned short *)(FIO_BASE + 0x38)) |
#define | FIO1SETU (*(volatile unsigned short *)(FIO_BASE + 0x3A)) |
#define | FIO2CLR FIOREG_BASE_ADDR_n(2,0x1C) |
#define | FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x5C)) |
#define | FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x5D)) |
#define | FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x5E)) |
#define | FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x5F)) |
#define | FIO2CLRU (*(volatile unsigned short *)(FIO_BASE + 0x5E)) |
#define | FIO2DIR FIOREG_BASE_ADDR_n(2,0) |
#define | FIO2DIR0 FIOREG_BASE_ADDR_n8(2,0) |
#define | FIO2DIR1 FIOREG_BASE_ADDR_n8(2,1) |
#define | FIO2DIR2 FIOREG_BASE_ADDR_n8(2,2) |
#define | FIO2DIR3 FIOREG_BASE_ADDR_n8(2,3) |
#define | FIO2DIRL FIOREG_BASE_ADDR_n16(2,0) |
#define | FIO2DIRU FIOREG_BASE_ADDR_n16(2,2) |
#define | FIO2MASK FIOREG_BASE_ADDR_n(2,0x10) |
#define | FIO2MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(2,0) |
#define | FIO2MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(2,1) |
#define | FIO2MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(2,2) |
#define | FIO2MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(2,3) |
#define | FIO2MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(2) |
#define | FIO2MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(2) |
#define | FIO2PIN FIOREG_BASE_ADDR_n(2,0x14) |
#define | FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x54)) |
#define | FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x55)) |
#define | FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x56)) |
#define | FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x57)) |
#define | FIO2PINL (*(volatile unsigned short *)(FIO_BASE + 0x54)) |
#define | FIO2PINU (*(volatile unsigned short *)(FIO_BASE + 0x56)) |
#define | FIO2SET FIOREG_BASE_ADDR_n(2,0x18) |
#define | FIO2SET0 (*(volatile unsigned char *)(FIO_BASE + 0x58)) |
#define | FIO2SET1 (*(volatile unsigned char *)(FIO_BASE + 0x59)) |
#define | FIO2SET2 (*(volatile unsigned char *)(FIO_BASE + 0x5A)) |
#define | FIO2SET3 (*(volatile unsigned char *)(FIO_BASE + 0x5B)) |
#define | FIO2SETL (*(volatile unsigned short *)(FIO_BASE + 0x58)) |
#define | FIO2SETU (*(volatile unsigned short *)(FIO_BASE + 0x5A)) |
#define | FIO3CLR FIOREG_BASE_ADDR_n(3,0x1C) |
#define | FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x7C)) |
#define | FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x7D)) |
#define | FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x7E)) |
#define | FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x7F)) |
#define | FIO3CLRU (*(volatile unsigned short *)(FIO_BASE + 0x7E)) |
#define | FIO3DIR FIOREG_BASE_ADDR_n(3,0) |
#define | FIO3DIR0 FIOREG_BASE_ADDR_n8(3,0) |
#define | FIO3DIR1 FIOREG_BASE_ADDR_n8(3,1) |
#define | FIO3DIR2 FIOREG_BASE_ADDR_n8(3,2) |
#define | FIO3DIR3 FIOREG_BASE_ADDR_n8(3,3) |
#define | FIO3DIRL FIOREG_BASE_ADDR_n16(3,0) |
#define | FIO3DIRU FIOREG_BASE_ADDR_n16(3,2) |
#define | FIO3MASK FIOREG_BASE_ADDR_n(3,0x10) |
#define | FIO3MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(3,0) |
#define | FIO3MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(3,1) |
#define | FIO3MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(3,2) |
#define | FIO3MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(3,3) |
#define | FIO3MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(3) |
#define | FIO3MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(3) |
#define | FIO3PIN FIOREG_BASE_ADDR_n(3,0x14) |
#define | FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x74)) |
#define | FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x75)) |
#define | FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x76)) |
#define | FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x77)) |
#define | FIO3PINL (*(volatile unsigned short *)(FIO_BASE + 0x74)) |
#define | FIO3PINU (*(volatile unsigned short *)(FIO_BASE + 0x76)) |
#define | FIO3SET FIOREG_BASE_ADDR_n(3,0x18) |
#define | FIO3SET0 (*(volatile unsigned char *)(FIO_BASE + 0x78)) |
#define | FIO3SET1 (*(volatile unsigned char *)(FIO_BASE + 0x79)) |
#define | FIO3SET2 (*(volatile unsigned char *)(FIO_BASE + 0x7A)) |
#define | FIO3SET3 (*(volatile unsigned char *)(FIO_BASE + 0x7B)) |
#define | FIO3SETL (*(volatile unsigned short *)(FIO_BASE + 0x78)) |
#define | FIO3SETU (*(volatile unsigned short *)(FIO_BASE + 0x7A)) |
#define | FIO4CLR FIOREG_BASE_ADDR_n(4,0x1C) |
#define | FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x9C)) |
#define | FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x9D)) |
#define | FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x9E)) |
#define | FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x9F)) |
#define | FIO4CLRU (*(volatile unsigned short *)(FIO_BASE + 0x9E)) |
#define | FIO4DIR FIOREG_BASE_ADDR_n(4,0) |
#define | FIO4DIR0 FIOREG_FIOREG_BASE_ADDR_n8BASE_ADDR_n8(4,0) |
#define | FIO4DIR1 FIOREG_BASE_ADDR_n8(4,1) |
#define | FIO4DIR2 FIOREG_BASE_ADDR_n8(4,2) |
#define | FIO4DIR3 FIOREG_BASE_ADDR_n8(4,3) |
#define | FIO4DIRL FIOREG_BASE_ADDR_n16(4,0) |
#define | FIO4DIRU FIOREG_BASE_ADDR_n16(4,2) |
#define | FIO4MASK FIOREG_BASE_ADDR_n(4,0x10) |
#define | FIO4MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(4,0) |
#define | FIO4MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(4,1) |
#define | FIO4MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(4,2) |
#define | FIO4MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(4,3) |
#define | FIO4MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(4) |
#define | FIO4MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(4) |
#define | FIO4PIN FIOREG_BASE_ADDR_n(4,0x14) |
#define | FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x94)) |
#define | FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x95)) |
#define | FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x96)) |
#define | FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x97)) |
#define | FIO4PINL (*(volatile unsigned short *)(FIO_BASE + 0x94)) |
#define | FIO4PINU (*(volatile unsigned short *)(FIO_BASE + 0x96)) |
#define | FIO4SET FIOREG_BASE_ADDR_n(4,0x18) |
#define | FIO4SET0 (*(volatile unsigned char *)(FIO_BASE + 0x98)) |
#define | FIO4SET1 (*(volatile unsigned char *)(FIO_BASE + 0x99)) |
#define | FIO4SET2 (*(volatile unsigned char *)(FIO_BASE + 0x9A)) |
#define | FIO4SET3 (*(volatile unsigned char *)(FIO_BASE + 0x9B)) |
#define | FIO4SETL (*(volatile unsigned short *)(FIO_BASE + 0x98)) |
#define | FIO4SETU (*(volatile unsigned short *)(FIO_BASE + 0x9A)) |
#define | FIO_BASE LPC_FIO_BASE |
#define | FIOREG_BASE_ADDR_n(n, off) (*(REG32*)(LPC_FIO_BASE + (n<<5)+ off)) |
#define | FIOREG_BASE_ADDR_n16(n, off) (*(REG16*)(LPC_FIO_BASE + (n<<5)+ off)) |
#define | FIOREG_BASE_ADDR_n16_FIOMASKL(letter1) FIOREG_BASE_ADDR_n16(letter1,0x10) |
#define | FIOREG_BASE_ADDR_n16_FIOMASKU(letter1) FIOREG_BASE_ADDR_n16(letter1,0x12) |
#define | FIOREG_BASE_ADDR_n8(n, off) (*(REG8*)(LPC_FIO_BASE + (n<<5)+ off)) |
#define | FIOREG_BASE_ADDR_n8_FIOMASK(letter1, letter2) FIOREG_BASE_ADDR_n8(letter1,0x10+letter2) |
#define | GPDMA_CH0_CFG (*(REG32*)(LPC_GPDMA_BASE + 0x110)) |
#define | GPDMA_CH0_CTRL (*(REG32*)(LPC_GPDMA_BASE + 0x10C)) |
#define | GPDMA_CH0_DEST (*(REG32*)(LPC_GPDMA_BASE + 0x104)) |
#define | GPDMA_CH0_LLI (*(REG32*)(LPC_GPDMA_BASE + 0x108)) |
#define | GPDMA_CH0_SRC (*(REG32*)(LPC_GPDMA_BASE + 0x100)) |
#define | GPDMA_CH1_CFG (*(REG32*)(LPC_GPDMA_BASE + 0x130)) |
#define | GPDMA_CH1_CTRL (*(REG32*)(LPC_GPDMA_BASE + 0x12C)) |
#define | GPDMA_CH1_DEST (*(REG32*)(LPC_GPDMA_BASE + 0x124)) |
#define | GPDMA_CH1_LLI (*(REG32*)(LPC_GPDMA_BASE + 0x128)) |
#define | GPDMA_CH1_SRC (*(REG32*)(LPC_GPDMA_BASE + 0x120)) |
#define | GPDMA_CONFIG (*(REG32*)(LPC_GPDMA_BASE + 0x030)) |
#define | GPDMA_ENABLED_CHNS (*(REG32*)(LPC_GPDMA_BASE + 0x01C)) |
#define | GPDMA_INT_ERR_CLR (*(REG32*)(LPC_GPDMA_BASE + 0x010)) |
#define | GPDMA_INT_ERR_STAT (*(REG32*)(LPC_GPDMA_BASE + 0x00C)) |
#define | GPDMA_INT_STAT (*(REG32*)(LPC_GPDMA_BASE + 0x000)) |
#define | GPDMA_INT_TCCLR (*(REG32*)(LPC_GPDMA_BASE + 0x008)) |
#define | GPDMA_INT_TCSTAT (*(REG32*)(LPC_GPDMA_BASE + 0x004)) |
#define | GPDMA_RAW_INT_ERR_STAT (*(REG32*)(LPC_GPDMA_BASE + 0x018)) |
#define | GPDMA_RAW_INT_TCSTAT (*(REG32*)(LPC_GPDMA_BASE + 0x014)) |
#define | GPDMA_SOFT_BREQ (*(REG32*)(LPC_GPDMA_BASE + 0x020)) |
#define | GPDMA_SOFT_LBREQ (*(REG32*)(LPC_GPDMA_BASE + 0x028)) |
#define | GPDMA_SOFT_LSREQ (*(REG32*)(LPC_GPDMA_BASE + 0x02C)) |
#define | GPDMA_SOFT_SREQ (*(REG32*)(LPC_GPDMA_BASE + 0x024)) |
#define | GPDMA_SYNC (*(REG32*)(LPC_GPDMA_BASE + 0x034)) |
#define | GPIO_BASE LPC_GPIO_BASE |
#define | HC_BULK_CUR_ED (*(REG32*)(LPC_USBHC_BASE + 0x2C)) |
#define | HC_BULK_HEAD_ED (*(REG32*)(LPC_USBHC_BASE + 0x28)) |
#define | HC_CMD_STAT (*(REG32*)(LPC_USBHC_BASE + 0x08)) |
#define | HC_CONTROL (*(REG32*)(LPC_USBHC_BASE + 0x04)) |
#define | HC_CTRL_CUR_ED (*(REG32*)(LPC_USBHC_BASE + 0x24)) |
#define | HC_CTRL_HEAD_ED (*(REG32*)(LPC_USBHC_BASE + 0x20)) |
#define | HC_DONE_HEAD (*(REG32*)(LPC_USBHC_BASE + 0x30)) |
#define | HC_FM_INTERVAL (*(REG32*)(LPC_USBHC_BASE + 0x34)) |
#define | HC_FM_NUMBER (*(REG32*)(LPC_USBHC_BASE + 0x3C)) |
#define | HC_FM_REMAINING (*(REG32*)(LPC_USBHC_BASE + 0x38)) |
#define | HC_HCCA (*(REG32*)(LPC_USBHC_BASE + 0x18)) |
#define | HC_INT_DIS (*(REG32*)(LPC_USBHC_BASE + 0x14)) |
#define | HC_INT_EN (*(REG32*)(LPC_USBHC_BASE + 0x10)) |
#define | HC_INT_STAT (*(REG32*)(LPC_USBHC_BASE + 0x0C)) |
#define | HC_LS_THRHLD (*(REG32*)(LPC_USBHC_BASE + 0x44)) |
#define | HC_PERIOD_CUR_ED (*(REG32*)(LPC_USBHC_BASE + 0x1C)) |
#define | HC_PERIOD_START (*(REG32*)(LPC_USBHC_BASE + 0x40)) |
#define | HC_REVISION (*(REG32*)(LPC_USBHC_BASE + 0x00)) |
#define | HC_RH_DESCA (*(REG32*)(LPC_USBHC_BASE + 0x48)) |
#define | HC_RH_DESCB (*(REG32*)(LPC_USBHC_BASE + 0x4C)) |
#define | HC_RH_PORT_STAT1 (*(REG32*)(LPC_USBHC_BASE + 0x54)) |
#define | HC_RH_PORT_STAT2 (*(REG32*)(LPC_USBHC_BASE + 0x58)) |
#define | HC_RH_STAT (*(REG32*)(LPC_USBHC_BASE + 0x50)) |
#define | I2S_DAI (*(REG32*)(LPC_I2S_BASE + 0x04)) |
#define | I2S_DAO (*(REG32*)(LPC_I2S_BASE + 0x00)) |
#define | I2S_DMA1 (*(REG32*)(LPC_I2S_BASE + 0x14)) |
#define | I2S_DMA2 (*(REG32*)(LPC_I2S_BASE + 0x18)) |
#define | I2S_IRQ (*(REG32*)(LPC_I2S_BASE + 0x1C)) |
#define | I2S_RX_FIFO (*(REG32*)(LPC_I2S_BASE + 0x0C)) |
#define | I2S_RXRATE (*(REG32*)(LPC_I2S_BASE + 0x24)) |
#define | I2S_STATE (*(REG32*)(LPC_I2S_BASE + 0x10)) |
#define | I2S_TX_FIFO (*(REG32*)(LPC_I2S_BASE + 0x08)) |
#define | I2S_TXRATE (*(REG32*)(LPC_I2S_BASE + 0x20)) |
#define | i_MCU_MODEL 0 |
#define | INTWAKE (*(REG32*)(SCB_BASE + 0x144)) |
#define | IO0_INT_CLR (*(REG32*)(GPIO_BASE + 0x8C)) |
#define | IO0_INT_EN_F (*(REG32*)(GPIO_BASE + 0x94)) |
#define | IO0_INT_EN_R (*(REG32*)(GPIO_BASE + 0x90)) |
#define | IO0_INT_STAT_F (*(REG32*)(GPIO_BASE + 0x88)) |
#define | IO0_INT_STAT_R (*(REG32*)(GPIO_BASE + 0x84)) |
#define | IO2_INT_CLR (*(REG32*)(GPIO_BASE + 0xAC)) |
#define | IO2_INT_EN_F (*(REG32*)(GPIO_BASE + 0xB4)) |
#define | IO2_INT_EN_R (*(REG32*)(GPIO_BASE + 0xB0)) |
#define | IO2_INT_STAT_F (*(REG32*)(GPIO_BASE + 0xA8)) |
#define | IO2_INT_STAT_R (*(REG32*)(GPIO_BASE + 0xA4)) |
#define | IO_INT_STAT (*(REG32*)(GPIO_BASE + 0x80)) |
#define | IOCLR IOCLR0 |
#define | IOCLR0 (*(REG32*)(GPIO_BASE + 0x0C)) |
#define | IOCLR1 (*(REG32*)(GPIO_BASE + 0x1C)) |
#define | IODIR IODIR0 |
#define | IODIR0 (*(REG32*)(GPIO_BASE + 0x08)) |
#define | IODIR1 (*(REG32*)(GPIO_BASE + 0x18)) |
#define | IOPIN IOPIN0 |
#define | IOPIN0 (*(REG32*)(GPIO_BASE + 0x00)) |
#define | IOPIN1 (*(REG32*)(GPIO_BASE + 0x10)) |
#define | IOSET IOSET0 |
#define | IOSET0 (*(REG32*)(GPIO_BASE + 0x04)) |
#define | IOSET1 (*(REG32*)(GPIO_BASE + 0x14)) |
#define | IR_Off 0x00 |
#define | IRQn_Type char |
#define | LPC2XXX_PORT0 0 |
#define | LPC2XXX_PORT1 1 |
#define | LPC2XXX_PORT2 2 |
#define | LPC2XXX_PORT3 3 |
#define | LPC2XXX_PORT4 4 |
#define | LPC_T0_BASE LPC_TIM0_BASE |
#define | LPC_T1_BASE LPC_TIM1_BASE |
#define | LPC_T2_BASE LPC_TIM2_BASE |
#define | LPC_T3_BASE LPC_TIM3_BASE |
#define | MAC_CLRT (*(REG32*)(LPC_MAC_BASE + 0x010)) /* CoLlision window/ReTry reg */ |
#define | MAC_COMMAND (*(REG32*)(LPC_MAC_BASE + 0x100)) /* Command reg */ |
#define | MAC_FLOWCONTROLCNT (*(REG32*)(LPC_MAC_BASE + 0x170)) /* Flow control counter reg */ |
#define | MAC_FLOWCONTROLSTS (*(REG32*)(LPC_MAC_BASE + 0x174)) /* Flow control status reg */ |
#define | MAC_HASHFILTERH (*(REG32*)(LPC_MAC_BASE + 0x214)) /* Hash filter MSBs reg */ |
#define | MAC_HASHFILTERL (*(REG32*)(LPC_MAC_BASE + 0x210)) /* Hash filter LSBs reg */ |
#define | MAC_INTCLEAR (*(REG32*)(LPC_MAC_BASE + 0xFE8)) /* Interrupt clear reg (WO) */ |
#define | MAC_INTENABLE (*(REG32*)(LPC_MAC_BASE + 0xFE4)) /* Interrupt enable reg */ |
#define | MAC_INTSET (*(REG32*)(LPC_MAC_BASE + 0xFEC)) /* Interrupt set reg (WO) */ |
#define | MAC_INTSTATUS (*(REG32*)(LPC_MAC_BASE + 0xFE0)) /* Interrupt status reg (RO) */ |
#define | MAC_IPGR (*(REG32*)(LPC_MAC_BASE + 0x00C)) /* non b2b InterPacketGap reg */ |
#define | MAC_IPGT (*(REG32*)(LPC_MAC_BASE + 0x008)) /* b2b InterPacketGap reg */ |
#define | MAC_MAC1 (*(REG32*)(LPC_MAC_BASE + 0x000)) /* MAC config reg 1 */ |
#define | MAC_MAC2 (*(REG32*)(LPC_MAC_BASE + 0x004)) /* MAC config reg 2 */ |
#define | MAC_MADR (*(REG32*)(LPC_MAC_BASE + 0x028)) /* MII Mgmt ADdRess reg */ |
#define | MAC_MAXF (*(REG32*)(LPC_MAC_BASE + 0x014)) /* MAXimum Frame reg */ |
#define | MAC_MCFG (*(REG32*)(LPC_MAC_BASE + 0x020)) /* MII Mgmt ConFiG reg */ |
#define | MAC_MCMD (*(REG32*)(LPC_MAC_BASE + 0x024)) /* MII Mgmt CoMmanD reg */ |
#define | MAC_MIND (*(REG32*)(LPC_MAC_BASE + 0x034)) /* MII Mgmt INDicators reg (RO) */ |
#define | MAC_MODULEID (*(REG32*)(LPC_MAC_BASE + 0xFFC)) /* Module ID reg (RO) */ |
#define | MAC_MRDD (*(REG32*)(LPC_MAC_BASE + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ |
#define | MAC_MWTD (*(REG32*)(LPC_MAC_BASE + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ |
#define | MAC_POWERDOWN (*(REG32*)(LPC_MAC_BASE + 0xFF4)) /* Power-down reg */ |
#define | MAC_RSV (*(REG32*)(LPC_MAC_BASE + 0x160)) /* Rx status vector reg (RO) */ |
#define | MAC_RXCONSUMEINDEX (*(REG32*)(LPC_MAC_BASE + 0x118)) /* Rx consume index reg */ |
#define | MAC_RXDESCRIPTOR (*(REG32*)(LPC_MAC_BASE + 0x108)) /* Rx descriptor base address reg */ |
#define | MAC_RXDESCRIPTORNUM (*(REG32*)(LPC_MAC_BASE + 0x110)) /* Rx number of descriptors reg */ |
#define | MAC_RXFILTERCTRL (*(REG32*)(LPC_MAC_BASE + 0x200)) /* Rx filter ctrl reg */ |
#define | MAC_RXFILTERWOLCLR (*(REG32*)(LPC_MAC_BASE + 0x208)) /* Rx filter WoL clear reg (WO) */ |
#define | MAC_RXFILTERWOLSTS (*(REG32*)(LPC_MAC_BASE + 0x204)) /* Rx filter WoL status reg (RO) */ |
#define | MAC_RXPRODUCEINDEX (*(REG32*)(LPC_MAC_BASE + 0x114)) /* Rx produce index reg (RO) */ |
#define | MAC_RXSTATUS (*(REG32*)(LPC_MAC_BASE + 0x10C)) /* Rx status base address reg */ |
#define | MAC_SA0 (*(REG32*)(LPC_MAC_BASE + 0x040)) /* Station Address 0 reg */ |
#define | MAC_SA1 (*(REG32*)(LPC_MAC_BASE + 0x044)) /* Station Address 1 reg */ |
#define | MAC_SA2 (*(REG32*)(LPC_MAC_BASE + 0x048)) /* Station Address 2 reg */ |
#define | MAC_STATUS (*(REG32*)(LPC_MAC_BASE + 0x104)) /* Status reg (RO) */ |
#define | MAC_SUPP (*(REG32*)(LPC_MAC_BASE + 0x018)) /* PHY SUPPort reg */ |
#define | MAC_TEST (*(REG32*)(LPC_MAC_BASE + 0x01C)) /* TEST reg */ |
#define | MAC_TSV0 (*(REG32*)(LPC_MAC_BASE + 0x158)) /* Tx status vector 0 reg (RO) */ |
#define | MAC_TSV1 (*(REG32*)(LPC_MAC_BASE + 0x15C)) /* Tx status vector 1 reg (RO) */ |
#define | MAC_TXCONSUMEINDEX (*(REG32*)(LPC_MAC_BASE + 0x12C)) /* Tx consume index reg (RO) */ |
#define | MAC_TXDESCRIPTOR (*(REG32*)(LPC_MAC_BASE + 0x11C)) /* Tx descriptor base address reg */ |
#define | MAC_TXDESCRIPTORNUM (*(REG32*)(LPC_MAC_BASE + 0x124)) /* Tx number of descriptors reg */ |
#define | MAC_TXPRODUCEINDEX (*(REG32*)(LPC_MAC_BASE + 0x128)) /* Tx produce index reg */ |
#define | MAC_TXSTATUS (*(REG32*)(LPC_MAC_BASE + 0x120)) /* Tx status base address reg */ |
#define | MAMCR (*(REG32*)(SCB_BASE + 0x000)) |
#define | MAMTIM (*(REG32*)(SCB_BASE + 0x004)) |
#define | MAXPACKET_SIZE (*(REG32*)(USB_BASE + 0x4C)) |
#define | MCI_ARGUMENT (*(REG32*)(LPC_MCI_BASE + 0x08)) |
#define | MCI_CLEAR (*(REG16*)(LPC_MCI_BASE + 0x38)) |
#define | MCI_CLOCK (*(REG16*)(LPC_MCI_BASE + 0x04)) |
#define | MCI_COMMAND (*(REG16*)(LPC_MCI_BASE + 0x0C)) |
#define | MCI_DATA_CNT (*(REG16*)(LPC_MCI_BASE + 0x30)) |
#define | MCI_DATA_CTRL (*(REG8*)(LPC_MCI_BASE + 0x2C)) |
#define | MCI_DATA_LEN (*(REG16*)(LPC_MCI_BASE + 0x28)) |
#define | MCI_DATA_TMR (*(REG32*)(LPC_MCI_BASE + 0x24)) |
#define | MCI_FIFO (*(REG8*)(LPC_MCI_BASE + 0x80)) |
#define | MCI_FIFO_CNT (*(REG16*)(LPC_MCI_BASE + 0x48)) |
#define | MCI_MASK0 (*(REG32*)(LPC_MCI_BASE + 0x3C)) |
#define | MCI_MASK1 (*(REG32*)(LPC_MCI_BASE + 0x40)) |
#define | MCI_POWER (*(REG8 *)(LPC_MCI_BASE + 0x00)) |
#define | MCI_RESP0 (*(REG32*)(LPC_MCI_BASE + 0x14)) |
#define | MCI_RESP1 (*(REG32*)(LPC_MCI_BASE + 0x18)) |
#define | MCI_RESP2 (*(REG32*)(LPC_MCI_BASE + 0x1C)) |
#define | MCI_RESP3 (*(REG32*)(LPC_MCI_BASE + 0x20)) |
#define | MCI_RESP_CMD (*(REG8*)(LPC_MCI_BASE + 0x10)) |
#define | MCI_STATUS (*(REG32*)(LPC_MCI_BASE + 0x34)) |
#define | MCR_Off 0x14 |
#define | MEMMAP (*(REG32*)(SCB_BASE + 0x040)) |
#define | MR0_Off 0x18 |
#define | MR1_Off 0x1C |
#define | MR2_Off 0x20 |
#define | MR3_Off 0x24 |
#define | NDD_REQ_INT_CLR (*(REG32*)(USB_BASE + 0xB0)) |
#define | NDD_REQ_INT_SET (*(REG32*)(USB_BASE + 0xB4)) |
#define | NDD_REQ_INT_STAT (*(REG32*)(USB_BASE + 0xAC)) |
#define | OTG_CLK_CTRL (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x04)) |
#define | OTG_CLK_STAT (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x08)) |
#define | OTG_I2C_CLKHI (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x0C)) |
#define | OTG_I2C_CLKLO (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x10)) |
#define | OTG_I2C_CTL (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x08)) |
#define | OTG_I2C_RX (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x00)) |
#define | OTG_I2C_STS (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x04)) |
#define | OTG_I2C_TX (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x00)) |
#define | OTG_INT_CLR (*(REG32*)(LPC_USBOTG_BASE + 0x0C)) |
#define | OTG_INT_EN (*(REG32*)(LPC_USBOTG_BASE + 0x04)) |
#define | OTG_INT_SET (*(REG32*)(LPC_USBOTG_BASE + 0x08)) |
#define | OTG_INT_STAT (*(REG32*)(LPC_USBOTG_BASE + 0x00)) |
#define | OTG_STAT_CTRL (*(REG32*)(LPC_USBOTG_BASE + 0x10)) |
#define | OTG_TIMER (*(REG32*)(LPC_USBOTG_BASE + 0x14)) |
#define | PARTCFG (*(REG32*)(PARTCFG_BASE + 0x00)) |
#define | PC_Off 0x10 |
#define | PCLKSEL0 (*(REG32*)(SCB_BASE + 0x1A8)) |
#define | PCLKSEL1 (*(REG32*)(SCB_BASE + 0x1AC)) |
#define | PCON (*(REG32*)(SCB_BASE + 0x0C0)) |
#define | PCONP (*(REG32*)(SCB_BASE + 0x0C4)) |
#define | PIN_INPUT 0 |
FIO DIR CONSTANT TO MAKE PORT BE INPUT. | |
#define | PIN_OUTPUT 1 |
FIO DIR CONSTANT TO MAKE PORT BE OUTPUT. | |
#define | PINMODE0 PINMODE_n(0) |
#define | PINMODE1 PINMODE_n(1) |
#define | PINMODE10 PINMODE_n(10) |
#define | PINMODE2 PINMODE_n(2) |
#define | PINMODE3 PINMODE_n(3) |
#define | PINMODE4 PINMODE_n(4) |
#define | PINMODE5 PINMODE_n(5) |
#define | PINMODE6 PINMODE_n(6) |
#define | PINMODE7 PINMODE_n(7) |
#define | PINMODE8 PINMODE_n(8) |
#define | PINMODE9 PINMODE_n(9) |
#define | PINMODE_DEFAULT PINMODE_PULL_UP |
#define | PINMODE_n(n) (*(REG32*)(LPC_PINSEL_BASE + 0x40 + (n<<2))) |
#define | PINMODE_NO_PULL_ 2 |
#define | PINMODE_PULL_DOWN 3 |
#define | PINMODE_PULL_UP 0 |
#define | PINSEL0 PINSEL_n(0) |
#define | PINSEL1 PINSEL_n(1) |
#define | PINSEL10 PINSEL_n(10) |
#define | PINSEL2 PINSEL_n(2) |
#define | PINSEL3 PINSEL_n(3) |
#define | PINSEL4 PINSEL_n(4) |
#define | PINSEL5 PINSEL_n(5) |
#define | PINSEL6 PINSEL_n(6) |
#define | PINSEL7 PINSEL_n(7) |
#define | PINSEL8 PINSEL_n(8) |
#define | PINSEL9 PINSEL_n(9) |
#define | PINSEL_n(n) (*(REG32*)(LPC_PINSEL_BASE + (n<<2))) |
get PINSEL REG | |
#define | PLLCFG (*(REG32*)(SCB_BASE + 0x084)) |
#define | PLLCON (*(REG32*)(SCB_BASE + 0x080)) |
#define | PLLFEED (*(REG32*)(SCB_BASE + 0x08C)) |
#define | PLLSTAT (*(REG32*)(SCB_BASE + 0x088)) |
#define | PORT_CLEAR_PIN(number) FIOREG_BASE_ADDR_n(((number)>>5),0x1C) = 1 << ((number)&0x1F) |
SET PIN TO LOW LEVEL (IF DIRECTION IS PIN_OUTPUT ) | |
#define | PORT_DIRECTION_PIN(number, direction) |
SET PIN DIRECTION (PIN_OUTPUT or PIN_INPUT ) | |
#define | PORT_GET_PIN(number) (FIOREG_BASE_ADDR_n(((number)>>5),0x14) &(1 << ((number)&0x1F))) |
GET VALUE OF PIN. | |
#define | PORT_LPC2XXX_PWR_CONTRL_OFF(num) PCONP = PCONP & (~(1 <<(num##_lpc_periph))) |
#define | PORT_LPC2XXX_PWR_CONTRL_ON(num) PCONP = PCONP | (1 <<(num##_lpc_periph)) |
TURN ON PERIPHIRAL MODULE in NXP controller. | |
#define | PORT_PIN_MODE_GPIO 0 |
By default 0 configures GP IO. | |
#define | PORT_PIN_NUMBER(prt, number) (prt*32+number) |
Calculate common pin number accoding to number of port and pin. | |
#define | PORT_SELECT_PIN(number, value) |
Set pin accoding to pin number (number) and its mode (value) | |
#define | PORT_SET_PIN(number) FIOREG_BASE_ADDR_n(((number)>>5),0x18) = 1 << ((number)&0x1F) |
SET PIN TO HIGHT LEVEL (IF DIRECTION IS PIN_OUTPUT ) | |
#define | PR_Off 0x0C |
#define | PWM0CCR (*(REG32 *)(LPC_PWM0_BASE + 0x28)) |
#define | PWM0CR0 (*(REG32 *)(LPC_PWM0_BASE + 0x2C)) |
#define | PWM0CR1 (*(REG32 *)(LPC_PWM0_BASE + 0x30)) |
#define | PWM0CR2 (*(REG32 *)(LPC_PWM0_BASE + 0x34)) |
#define | PWM0CR3 (*(REG32 *)(LPC_PWM0_BASE + 0x38)) |
#define | PWM0CTCR (*(REG32 *)(LPC_PWM0_BASE + 0x70)) |
#define | PWM0EMR (*(REG32 *)(LPC_PWM0_BASE + 0x3C)) |
#define | PWM0IR (*(REG32 *)(LPC_PWM0_BASE + 0x00)) |
#define | PWM0LER (*(REG32 *)(LPC_PWM0_BASE + 0x50)) |
#define | PWM0MCR (*(REG32 *)(LPC_PWM0_BASE + 0x14)) |
#define | PWM0MR0 (*(REG32 *)(LPC_PWM0_BASE + 0x18)) |
#define | PWM0MR1 (*(REG32 *)(LPC_PWM0_BASE + 0x1C)) |
#define | PWM0MR2 (*(REG32 *)(LPC_PWM0_BASE + 0x20)) |
#define | PWM0MR3 (*(REG32 *)(LPC_PWM0_BASE + 0x24)) |
#define | PWM0MR4 (*(REG32 *)(LPC_PWM0_BASE + 0x40)) |
#define | PWM0MR5 (*(REG32 *)(LPC_PWM0_BASE + 0x44)) |
#define | PWM0MR6 (*(REG32 *)(LPC_PWM0_BASE + 0x48)) |
#define | PWM0PC (*(REG32 *)(LPC_PWM0_BASE + 0x10)) |
#define | PWM0PCR (*(REG32 *)(LPC_PWM0_BASE + 0x4C)) |
#define | PWM0PR (*(REG32 *)(LPC_PWM0_BASE + 0x0C)) |
#define | PWM0TC (*(REG32 *)(LPC_PWM0_BASE + 0x08)) |
#define | PWM0TCR (*(REG32 *)(LPC_PWM0_BASE + 0x04)) |
#define | PWM1CCR (*(REG32 *)(LPC_PWM1_BASE + 0x28)) |
#define | PWM1CR0 (*(REG32 *)(LPC_PWM1_BASE + 0x2C)) |
#define | PWM1CR1 (*(REG32 *)(LPC_PWM1_BASE + 0x30)) |
#define | PWM1CR2 (*(REG32 *)(LPC_PWM1_BASE + 0x34)) |
#define | PWM1CR3 (*(REG32 *)(LPC_PWM1_BASE + 0x38)) |
#define | PWM1CTCR (*(REG32 *)(LPC_PWM1_BASE + 0x70)) |
#define | PWM1EMR (*(REG32 *)(LPC_PWM1_BASE + 0x3C)) |
#define | PWM1IR (*(REG32 *)(LPC_PWM1_BASE + 0x00)) |
#define | PWM1LER (*(REG32 *)(LPC_PWM1_BASE + 0x50)) |
#define | PWM1MCR (*(REG32 *)(LPC_PWM1_BASE + 0x14)) |
#define | PWM1MR0 (*(REG32 *)(LPC_PWM1_BASE + 0x18)) |
#define | PWM1MR1 (*(REG32 *)(LPC_PWM1_BASE + 0x1C)) |
#define | PWM1MR2 (*(REG32 *)(LPC_PWM1_BASE + 0x20)) |
#define | PWM1MR3 (*(REG32 *)(LPC_PWM1_BASE + 0x24)) |
#define | PWM1MR4 (*(REG32 *)(LPC_PWM1_BASE + 0x40)) |
#define | PWM1MR5 (*(REG32 *)(LPC_PWM1_BASE + 0x44)) |
#define | PWM1MR6 (*(REG32 *)(LPC_PWM1_BASE + 0x48)) |
#define | PWM1PC (*(REG32 *)(LPC_PWM1_BASE + 0x10)) |
#define | PWM1PCR (*(REG32 *)(LPC_PWM1_BASE + 0x4C)) |
#define | PWM1PR (*(REG32 *)(LPC_PWM1_BASE + 0x0C)) |
#define | PWM1TC (*(REG32 *)(LPC_PWM1_BASE + 0x08)) |
#define | PWM1TCR (*(REG32 *)(LPC_PWM1_BASE + 0x04)) |
#define | REALIZE_EP (*(REG32*)(USB_BASE + 0x44)) |
#define | RSID (*(REG32*)(SCB_BASE + 0x180)) |
#define | RTC_ALDOM (*(REG32*)(LPC_RTC_BASE + 0x6C)) |
#define | RTC_ALDOW (*(REG32*)(LPC_RTC_BASE + 0x70)) |
#define | RTC_ALDOY (*(REG32*)(LPC_RTC_BASE + 0x74)) |
#define | RTC_ALHOUR (*(REG32*)(LPC_RTC_BASE + 0x68)) |
#define | RTC_ALMIN (*(REG32*)(LPC_RTC_BASE + 0x64)) |
#define | RTC_ALMON (*(REG32*)(LPC_RTC_BASE + 0x78)) |
#define | RTC_ALSEC (*(REG32*)(LPC_RTC_BASE + 0x60)) |
#define | RTC_ALYEAR (*(REG32*)(LPC_RTC_BASE + 0x7C)) |
#define | RTC_AMR (*(REG32*)(LPC_RTC_BASE + 0x10)) |
#define | RTC_CCR (*(REG32*)(LPC_RTC_BASE + 0x08)) |
#define | RTC_CIIR (*(REG32*)(LPC_RTC_BASE + 0x0C)) |
#define | RTC_CISS (*(REG32*)(LPC_RTC_BASE + 0x40)) |
#define | RTC_CTC (*(REG32*)(LPC_RTC_BASE + 0x04)) |
#define | RTC_CTIME0 (*(REG32*)(LPC_RTC_BASE + 0x14)) |
#define | RTC_CTIME1 (*(REG32*)(LPC_RTC_BASE + 0x18)) |
#define | RTC_CTIME2 (*(REG32*)(LPC_RTC_BASE + 0x1C)) |
#define | RTC_DOM (*(REG32*)(LPC_RTC_BASE + 0x2C)) |
#define | RTC_DOW (*(REG32*)(LPC_RTC_BASE + 0x30)) |
#define | RTC_DOY (*(REG32*)(LPC_RTC_BASE + 0x34)) |
#define | RTC_HOUR (*(REG32*)(LPC_RTC_BASE + 0x28)) |
#define | RTC_ILR (*(REG32*)(LPC_RTC_BASE + 0x00)) |
#define | RTC_MIN (*(REG32*)(LPC_RTC_BASE + 0x24)) |
#define | RTC_MONTH (*(REG32*)(LPC_RTC_BASE + 0x38)) |
#define | RTC_PREFRAC (*(REG32*)(LPC_RTC_BASE + 0x84)) |
#define | RTC_PREINT (*(REG32*)(LPC_RTC_BASE + 0x80)) |
#define | RTC_SEC (*(REG32*)(LPC_RTC_BASE + 0x20)) |
#define | RTC_YEAR (*(REG32*)(LPC_RTC_BASE + 0x3C)) |
#define | RX_DATA (*(REG32*)(USB_BASE + 0x18)) |
#define | RX_PLENGTH (*(REG32*)(USB_BASE + 0x20)) |
#define | S0SPCCR (*(REG32*)(LPC_SPI0_BASE + 0x0C)) |
#define | S0SPCR (*(REG32*)(LPC_SPI0_BASE + 0x00)) |
#define | S0SPDR (*(REG32*)(LPC_SPI0_BASE + 0x08)) |
#define | S0SPINT (*(REG32*)(LPC_SPI0_BASE + 0x1C)) |
#define | S0SPSR (*(REG32*)(LPC_SPI0_BASE + 0x04)) |
#define | S0SPTCR (*(REG32*)(LPC_SPI0_BASE + 0x10)) |
#define | S0SPTSR (*(REG32*)(LPC_SPI0_BASE + 0x14)) |
#define | SCB_BASE 0xE01FC000 |
#define | SCS (*(REG32*)(SCB_BASE + 0x1A0)) |
#define | SSP0CPSR (*(REG32*)(LPC_SSP0_BASE + 0x10)) |
#define | SSP0CR0 (*(REG32*)(LPC_SSP0_BASE + 0x00)) |
#define | SSP0CR1 (*(REG32*)(LPC_SSP0_BASE + 0x04)) |
#define | SSP0DMACR (*(REG32*)(LPC_SSP0_BASE + 0x24)) |
#define | SSP0DR (*(REG32*)(LPC_SSP0_BASE + 0x08)) |
#define | SSP0ICR (*(REG32*)(LPC_SSP0_BASE + 0x20)) |
#define | SSP0IMSC (*(REG32*)(LPC_SSP0_BASE + 0x14)) |
#define | SSP0MIS (*(REG32*)(LPC_SSP0_BASE + 0x1C)) |
#define | SSP0RIS (*(REG32*)(LPC_SSP0_BASE + 0x18)) |
#define | SSP0SR (*(REG32*)(LPC_SSP0_BASE + 0x0C)) |
#define | SYS_ERR_INT_CLR (*(REG32*)(USB_BASE + 0xBC)) |
#define | SYS_ERR_INT_SET (*(REG32*)(USB_BASE + 0xC0)) |
#define | SYS_ERR_INT_STAT (*(REG32*)(USB_BASE + 0xB8)) |
#define | T0CCR VBP_REG32(T0,CCR) |
#define | T0CR0 VBP_REG32(T0,CR0) |
#define | T0CR1 VBP_REG32(T0,CR1) |
#define | T0CR2 VBP_REG32(T0,CR2) |
#define | T0CR3 VBP_REG32(T0,CR3) |
#define | T0CTCR VBP_REG32(T0,CTCR) |
#define | T0EMR VBP_REG32(T0,EMR) |
#define | T0IR VBP_REG32(T0,IR) |
#define | T0MCR VBP_REG32(T0,MCR) |
#define | T0MR0 VBP_REG32(T0,MR0) |
#define | T0MR1 VBP_REG32(T0,MR1) |
#define | T0MR2 VBP_REG32(T0,MR2) |
#define | T0MR3 VBP_REG32(T0,MR3) |
#define | T0PC VBP_REG32(T0,PC) |
#define | T0PR VBP_REG32(T0,PR) |
#define | T0TC VBP_REG32(T0,TC) |
#define | T0TCR VBP_REG32(T0,TCR) |
#define | T1CCR VBP_REG32(T1,CCR) |
#define | T1CR0 VBP_REG32(T1,CR0) |
#define | T1CR1 VBP_REG32(T1,CR1) |
#define | T1CR2 VBP_REG32(T1,CR2) |
#define | T1CR3 VBP_REG32(T1,CR3) |
#define | T1CTCR VBP_REG32(T1,CTCR) |
#define | T1EMR VBP_REG32(T1,EMR) |
#define | T1IR VBP_REG32(T1,IR) |
#define | T1MCR VBP_REG32(T1,MCR) |
#define | T1MR0 VBP_REG32(T1,MR0) |
#define | T1MR1 VBP_REG32(T1,MR1) |
#define | T1MR2 VBP_REG32(T1,MR2) |
#define | T1MR3 VBP_REG32(T1,MR3) |
#define | T1PC VBP_REG32(T1,PC) |
#define | T1PR VBP_REG32(T1,PR) |
#define | T1TC VBP_REG32(T1,TC) |
#define | T1TCR VBP_REG32(T1,TCR) |
#define | T2CCR VBP_REG32(T2,CCR) |
#define | T2CR0 VBP_REG32(T2,CR0) |
#define | T2CR1 VBP_REG32(T2,CR1) |
#define | T2CR2 VBP_REG32(T2,CR2) |
#define | T2CR3 VBP_REG32(T2,CR3) |
#define | T2CTCR VBP_REG32(T2,CTCR) |
#define | T2EMR VBP_REG32(T2,EMR) |
#define | T2IR VBP_REG32(T2,IR) |
#define | T2MCR VBP_REG32(T2,MCR) |
#define | T2MR0 VBP_REG32(T2,MR0) |
#define | T2MR1 VBP_REG32(T2,MR1) |
#define | T2MR2 VBP_REG32(T2,MR2) |
#define | T2MR3 VBP_REG32(T2,MR3) |
#define | T2PC VBP_REG32(T2,PC) |
#define | T2PR VBP_REG32(T2,PR) |
#define | T2TC VBP_REG32(T2,TC) |
#define | T2TCR VBP_REG32(T2,TCR) |
#define | T3CCR VBP_REG32(T3,CCR) |
#define | T3CR0 VBP_REG32(T3,CR0) |
#define | T3CR1 VBP_REG32(T3,CR1) |
#define | T3CR2 VBP_REG32(T3,CR2) |
#define | T3CR3 VBP_REG32(T3,CR3) |
#define | T3CTCR VBP_REG32(T3,CTCR) |
#define | T3EMR VBP_REG32(T3,EMR) |
#define | T3IR VBP_REG32(T3,IR) |
#define | T3MCR VBP_REG32(T3,MCR) |
#define | T3MR0 VBP_REG32(T3,MR0) |
#define | T3MR1 VBP_REG32(T3,MR1) |
#define | T3MR2 VBP_REG32(T3,MR2) |
#define | T3MR3 VBP_REG32(T3,MR3) |
#define | T3PC VBP_REG32(T3,PC) |
#define | T3PR VBP_REG32(T3,PR) |
#define | T3TC VBP_REG32(T3,TC) |
#define | T3TCR VBP_REG32(T3,TCR) |
#define | TC_Off 0x08 |
#define | TCR_Off 0x04 |
#define | TX_DATA (*(REG32*)(USB_BASE + 0x1C)) |
#define | TX_PLENGTH (*(REG32*)(USB_BASE + 0x24)) |
#define | UART_0_RX_PIN_NUMBER (UART_0_TX_PIN_NUMBER+1) |
PINSEL0 Mask for UART0. | |
#define | UART_0_RX_PIN_SELECT UART_0_TX_PIN_SELECT |
PINSEL0 Value for UART0. | |
#define | UART_0_TX_PIN_NUMBER PORT_PIN_NUMBER(LPC2XXX_PORT0,0) |
PINSEL0 Mask for UART0. | |
#define | UART_0_TX_PIN_SELECT 1 |
PINSEL0 Value for UART0. | |
#define | UART_1_RX_PIN_NUMBER (UART_1_TX_PIN_NUMBER+1) |
PINSEL0 Mask for UART1. | |
#define | UART_1_RX_PIN_SELECT UART_1_TX_PIN_SELECT |
PINSEL0 Value for UART1. | |
#define | UART_1_TX_PIN_NUMBER PORT_PIN_NUMBER(LPC2XXX_PORT0,8) |
PINSEL0 Mask for UART1. | |
#define | UART_1_TX_PIN_SELECT 1 |
PINSEL0 Value for UART1. | |
#define | UDCA_HEAD (*(REG32*)(USB_BASE + 0x80)) |
#define | USB_CTRL (*(REG32*)(USB_BASE + 0x28)) |
#define | USB_INT_BASE 0xE01FC1C0 |
#define | USB_INT_STAT (*(REG32*)(USB_INT_BASE + 0x00)) |
#define | USBCLKCFG (*(REG32*)(SCB_BASE + 0x108)) |
#define | USBClkCtrl (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x04)) |
#define | USBClkSt (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x08)) |
#define | USBPortSel (*(REG32*)(LPC_USBOTG_BASE + 0x10)) |
#define | VIC ((vicRegs_t *)VIC_BASE) |
#define | VIC_ADC 18 |
#define | VIC_ARM_CORE_ICE_RX 2 |
#define | VIC_ARM_CORE_ICE_TX 3 |
#define | VIC_ARM_PROGRAMM_INT 2 |
#define | VIC_BIT(chan) (1 << (chan)) |
Vector Control Register – Convert Channel Number to Bit Value. | |
#define | VIC_CAN1_RX 26 |
#define | VIC_CAN1_TX 20 |
#define | VIC_CAN2_RX 27 |
#define | VIC_CAN2_TX 21 |
#define | VIC_CAN3_RX 28 |
#define | VIC_CAN3_TX 22 |
#define | VIC_CAN4_RX 29 |
#define | VIC_CAN4_TX 23 |
#define | VIC_EINT0 14 |
#define | VIC_EINT1 15 |
#define | VIC_EINT2 16 |
#define | VIC_EINT3 17 |
#define | VIC_ENABLE (1 << 5) |
Vector Control Register – Vector Interrupt Controller Enable. | |
#define | VIC_HIGH_PRIORITY 0x04 |
#define | VIC_HIGHEST_PRIORITY 0x01 |
#define | VIC_I2C 9 |
#define | VIC_LOW_PRIORITY 0x0B |
#define | VIC_LOWEST_PRIORITY 0x0F |
#define | VIC_MAX_IRQ_NUMBER (VIC_SIZE-1) |
#define | VIC_MEDIUM_PRIORITY 0x07 |
#define | VIC_PLL 12 |
#define | VIC_PWM 8 |
#define | VIC_PWM0 8 |
#define | VIC_RESERVE_23 24 |
#define | VIC_RESERVE_24 25 |
#define | VIC_RTC 13 |
#define | VIC_SIZE 16 |
#define | VIC_SPI 10 |
#define | VIC_SPI0 10 |
#define | VIC_SPI1 11 |
#define | VIC_SSP0 10 |
#define | VIC_SSP1 11 |
#define | VIC_TIMER0 4 |
#define | VIC_TIMER1 5 |
#define | VIC_UART0 6 |
#define | VIC_UART1 7 |
#define | VIC_WDT 0 |
#define | VICFIQStatus (*(REG32*)(VIC_BASE + 0x004)) |
#define | VICIntEnable (*(REG32*)(VIC_BASE + 0x010)) |
#define | VICIntEnClr (*(REG32*)(VIC_BASE + 0x014)) |
#define | VICIntSelect (*(REG32*)(VIC_BASE + 0x00C)) |
#define | VICIRQStatus (*(REG32*)(VIC_BASE + 0x000)) |
#define | VICProtection (*(REG32*)(VIC_BASE + 0x020)) |
#define | VICRawIntr (*(REG32*)(VIC_BASE + 0x008)) |
#define | VICSoftInt (*(REG32*)(VIC_BASE + 0x018)) |
#define | VICSoftIntClr (*(REG32*)(VIC_BASE + 0x01C)) |
#define | VICSWPrioMask (*(REG32*)(VIC_BASE + 0x024)) |
#define | VICVectAddr (*(REG32*)(VIC_BASE + 0xF00)) |
#define | VICVectAddr0 VICVectAddr_n(0) |
#define | VICVectAddr1 VICVectAddr_n(1) |
#define | VICVectAddr10 VICVectAddr_n(10) |
#define | VICVectAddr11 VICVectAddr_n(11) |
#define | VICVectAddr12 VICVectAddr_n(12) |
#define | VICVectAddr13 VICVectAddr_n(13) |
#define | VICVectAddr14 VICVectAddr_n(14) |
#define | VICVectAddr15 VICVectAddr_n(15) |
#define | VICVectAddr16 VICVectAddr_n(16) |
#define | VICVectAddr17 VICVectAddr_n(17) |
#define | VICVectAddr18 VICVectAddr_n(18) |
#define | VICVectAddr19 VICVectAddr_n(19) |
#define | VICVectAddr2 VICVectAddr_n(2) |
#define | VICVectAddr20 VICVectAddr_n(20) |
#define | VICVectAddr21 VICVectAddr_n(21) |
#define | VICVectAddr22 VICVectAddr_n(22) |
#define | VICVectAddr23 VICVectAddr_n(23) |
#define | VICVectAddr24 VICVectAddr_n(24) |
#define | VICVectAddr25 VICVectAddr_n(25) |
#define | VICVectAddr26 VICVectAddr_n(26) |
#define | VICVectAddr27 VICVectAddr_n(27) |
#define | VICVectAddr28 VICVectAddr_n(28) |
#define | VICVectAddr29 VICVectAddr_n(29) |
#define | VICVectAddr3 VICVectAddr_n(3) |
#define | VICVectAddr30 VICVectAddr_n(30) |
#define | VICVectAddr31 VICVectAddr_n(31) |
#define | VICVectAddr4 VICVectAddr_n(4) |
#define | VICVectAddr5 VICVectAddr_n(5) |
#define | VICVectAddr6 VICVectAddr_n(6) |
#define | VICVectAddr7 VICVectAddr_n(7) |
#define | VICVectAddr8 VICVectAddr_n(8) |
#define | VICVectAddr9 VICVectAddr_n(9) |
#define | VICVectAddr_n(n) (*(REG32*)(VIC_BASE + 256 + n*4)) |
#define | VICVectCntl0 VICVectCntl_n(0) |
#define | VICVectCntl1 VICVectCntl_n(1) |
#define | VICVectCntl10 VICVectCntl_n(10) |
#define | VICVectCntl11 VICVectCntl_n(11) |
#define | VICVectCntl12 VICVectCntl_n(12) |
#define | VICVectCntl13 VICVectCntl_n(13) |
#define | VICVectCntl14 VICVectCntl_n(14) |
#define | VICVectCntl15 VICVectCntl_n(15) |
#define | VICVectCntl16 VICVectCntl_n(16) |
#define | VICVectCntl17 VICVectCntl_n(17) |
#define | VICVectCntl18 VICVectCntl_n(18) |
#define | VICVectCntl19 VICVectCntl_n(19) |
#define | VICVectCntl2 VICVectCntl_n(2) |
#define | VICVectCntl20 VICVectCntl_n(20) |
#define | VICVectCntl21 VICVectCntl_n(21) |
#define | VICVectCntl22 VICVectCntl_n(22) |
#define | VICVectCntl23 VICVectCntl_n(23) |
#define | VICVectCntl24 VICVectCntl_n(24) |
#define | VICVectCntl25 VICVectCntl_n(25) |
#define | VICVectCntl26 VICVectCntl_n(26) |
#define | VICVectCntl27 VICVectCntl_n(27) |
#define | VICVectCntl28 VICVectCntl_n(28) |
#define | VICVectCntl29 VICVectCntl_n(29) |
#define | VICVectCntl3 VICVectCntl_n(3) |
#define | VICVectCntl30 VICVectCntl_n(30) |
#define | VICVectCntl31 VICVectCntl_n(31) |
#define | VICVectCntl4 VICVectCntl_n(4) |
#define | VICVectCntl5 VICVectCntl_n(5) |
#define | VICVectCntl6 VICVectCntl_n(6) |
#define | VICVectCntl7 VICVectCntl_n(7) |
#define | VICVectCntl8 VICVectCntl_n(8) |
#define | VICVectCntl9 VICVectCntl_n(9) |
#define | VICVectCntl_n(n) (*(REG32*)(VIC_BASE + 256*2 + n*4)) |
#define | VICVectPriority0 VICVectCntl_n(0) |
#define | VICVectPriority1 VICVectCntl_n(1) |
#define | VICVectPriority10 VICVectCntl_n(10) |
#define | VICVectPriority11 VICVectCntl_n(11) |
#define | VICVectPriority12 VICVectCntl_n(12) |
#define | VICVectPriority13 VICVectCntl_n(13) |
#define | VICVectPriority14 VICVectCntl_n(14) |
#define | VICVectPriority15 VICVectCntl_n(15) |
#define | VICVectPriority16 VICVectCntl_n(16) |
#define | VICVectPriority17 VICVectCntl_n(17) |
#define | VICVectPriority18 VICVectCntl_n(18) |
#define | VICVectPriority19 VICVectCntl_n(19) |
#define | VICVectPriority2 VICVectCntl_n(2) |
#define | VICVectPriority20 VICVectCntl_n(20) |
#define | VICVectPriority21 VICVectCntl_n(21) |
#define | VICVectPriority22 VICVectCntl_n(22) |
#define | VICVectPriority23 VICVectCntl_n(23) |
#define | VICVectPriority24 VICVectCntl_n(24) |
#define | VICVectPriority25 VICVectCntl_n(25) |
#define | VICVectPriority26 VICVectCntl_n(26) |
#define | VICVectPriority27 VICVectCntl_n(27) |
#define | VICVectPriority28 VICVectCntl_n(28) |
#define | VICVectPriority29 VICVectCntl_n(29) |
#define | VICVectPriority3 VICVectCntl_n(3) |
#define | VICVectPriority30 VICVectCntl_n(30) |
#define | VICVectPriority31 VICVectCntl_n(31) |
#define | VICVectPriority4 VICVectCntl_n(4) |
#define | VICVectPriority5 VICVectCntl_n(5) |
#define | VICVectPriority6 VICVectCntl_n(6) |
#define | VICVectPriority7 VICVectCntl_n(7) |
#define | VICVectPriority8 VICVectCntl_n(8) |
#define | VICVectPriority9 VICVectCntl_n(9) |
#define | WDCLKSEL (*(REG32*)(LPC_WDG_BASE + 0x10)) |
#define | WDFEED (*(REG32*)(LPC_WDG_BASE + 0x08)) |
#define | WDMOD (*(REG32*)(LPC_WDG_BASE + 0x0)) |
#define | WDTC (*(REG32*)(LPC_WDG_BASE + 0x04)) |
#define | WDTV (*(REG32*)(LPC_WDG_BASE + 0x0C)) |
#define AD0CR (*(REG32*)(LPC_AD0_BASE + 0x00)) |
Definition at line 1180 of file lpc2xxx_old.h.
#define AD0DR0 (*(REG32*)(LPC_AD0_BASE + 0x10)) |
Definition at line 1183 of file lpc2xxx_old.h.
#define AD0DR1 (*(REG32*)(LPC_AD0_BASE + 0x14)) |
Definition at line 1184 of file lpc2xxx_old.h.
#define AD0DR2 (*(REG32*)(LPC_AD0_BASE + 0x18)) |
Definition at line 1185 of file lpc2xxx_old.h.
#define AD0DR3 (*(REG32*)(LPC_AD0_BASE + 0x1C)) |
Definition at line 1186 of file lpc2xxx_old.h.
#define AD0DR4 (*(REG32*)(LPC_AD0_BASE + 0x20)) |
Definition at line 1187 of file lpc2xxx_old.h.
#define AD0DR5 (*(REG32*)(LPC_AD0_BASE + 0x24)) |
Definition at line 1188 of file lpc2xxx_old.h.
#define AD0DR6 (*(REG32*)(LPC_AD0_BASE + 0x28)) |
Definition at line 1189 of file lpc2xxx_old.h.
#define AD0DR7 (*(REG32*)(LPC_AD0_BASE + 0x2C)) |
Definition at line 1190 of file lpc2xxx_old.h.
#define AD0GDR (*(REG32*)(LPC_AD0_BASE + 0x04)) |
Definition at line 1181 of file lpc2xxx_old.h.
#define AD0INTEN (*(REG32*)(LPC_AD0_BASE + 0x0C)) |
Definition at line 1182 of file lpc2xxx_old.h.
#define AD0STAT (*(REG32*)(LPC_AD0_BASE + 0x30)) |
Definition at line 1191 of file lpc2xxx_old.h.
Definition at line 373 of file lpc2xxx_old.h.
Definition at line 374 of file lpc2xxx_old.h.
Definition at line 353 of file lpc2xxx_old.h.
#define CAN1BTR (*(REG32 *)(LPC_CAN1_BASE + 0x14)) |
Definition at line 1350 of file lpc2xxx_old.h.
#define CAN1CMR (*(REG32 *)(LPC_CAN1_BASE + 0x04)) |
Definition at line 1346 of file lpc2xxx_old.h.
#define CAN1EWL (*(REG32 *)(LPC_CAN1_BASE + 0x18)) |
Definition at line 1351 of file lpc2xxx_old.h.
#define CAN1GSR (*(REG32 *)(LPC_CAN1_BASE + 0x08)) |
Definition at line 1347 of file lpc2xxx_old.h.
#define CAN1ICR (*(REG32 *)(LPC_CAN1_BASE + 0x0C)) |
Definition at line 1348 of file lpc2xxx_old.h.
#define CAN1IER (*(REG32 *)(LPC_CAN1_BASE + 0x10)) |
Definition at line 1349 of file lpc2xxx_old.h.
#define CAN1MOD (*(REG32 *)(LPC_CAN1_BASE + 0x00)) |
Definition at line 1345 of file lpc2xxx_old.h.
#define CAN1RDA (*(REG32 *)(LPC_CAN1_BASE + 0x28)) |
Definition at line 1355 of file lpc2xxx_old.h.
#define CAN1RDB (*(REG32 *)(LPC_CAN1_BASE + 0x2C)) |
Definition at line 1356 of file lpc2xxx_old.h.
#define CAN1RFS (*(REG32 *)(LPC_CAN1_BASE + 0x20)) |
Definition at line 1353 of file lpc2xxx_old.h.
#define CAN1RID (*(REG32 *)(LPC_CAN1_BASE + 0x24)) |
Definition at line 1354 of file lpc2xxx_old.h.
#define CAN1SR (*(REG32 *)(LPC_CAN1_BASE + 0x1C)) |
Definition at line 1352 of file lpc2xxx_old.h.
#define CAN1TDA1 (*(REG32 *)(LPC_CAN1_BASE + 0x38)) |
Definition at line 1360 of file lpc2xxx_old.h.
#define CAN1TDA2 (*(REG32 *)(LPC_CAN1_BASE + 0x48)) |
Definition at line 1364 of file lpc2xxx_old.h.
#define CAN1TDA3 (*(REG32 *)(LPC_CAN1_BASE + 0x58)) |
Definition at line 1368 of file lpc2xxx_old.h.
#define CAN1TDB1 (*(REG32 *)(LPC_CAN1_BASE + 0x3C)) |
Definition at line 1361 of file lpc2xxx_old.h.
#define CAN1TDB2 (*(REG32 *)(LPC_CAN1_BASE + 0x4C)) |
Definition at line 1365 of file lpc2xxx_old.h.
#define CAN1TDB3 (*(REG32 *)(LPC_CAN1_BASE + 0x5C)) |
Definition at line 1369 of file lpc2xxx_old.h.
#define CAN1TFI1 (*(REG32 *)(LPC_CAN1_BASE + 0x30)) |
Definition at line 1358 of file lpc2xxx_old.h.
#define CAN1TFI2 (*(REG32 *)(LPC_CAN1_BASE + 0x40)) |
Definition at line 1362 of file lpc2xxx_old.h.
#define CAN1TFI3 (*(REG32 *)(LPC_CAN1_BASE + 0x50)) |
Definition at line 1366 of file lpc2xxx_old.h.
#define CAN1TID1 (*(REG32 *)(LPC_CAN1_BASE + 0x34)) |
Definition at line 1359 of file lpc2xxx_old.h.
#define CAN1TID2 (*(REG32 *)(LPC_CAN1_BASE + 0x44)) |
Definition at line 1363 of file lpc2xxx_old.h.
#define CAN1TID3 (*(REG32 *)(LPC_CAN1_BASE + 0x54)) |
Definition at line 1367 of file lpc2xxx_old.h.
#define CAN2BTR (*(REG32 *)(LPC_CAN2_BASE + 0x14)) |
Definition at line 1376 of file lpc2xxx_old.h.
#define CAN2CMR (*(REG32 *)(LPC_CAN2_BASE + 0x04)) |
Definition at line 1372 of file lpc2xxx_old.h.
#define CAN2EWL (*(REG32 *)(LPC_CAN2_BASE + 0x18)) |
Definition at line 1377 of file lpc2xxx_old.h.
#define CAN2GSR (*(REG32 *)(LPC_CAN2_BASE + 0x08)) |
Definition at line 1373 of file lpc2xxx_old.h.
#define CAN2ICR (*(REG32 *)(LPC_CAN2_BASE + 0x0C)) |
Definition at line 1374 of file lpc2xxx_old.h.
#define CAN2IER (*(REG32 *)(LPC_CAN2_BASE + 0x10)) |
Definition at line 1375 of file lpc2xxx_old.h.
#define CAN2MOD (*(REG32 *)(LPC_CAN2_BASE + 0x00)) |
Definition at line 1371 of file lpc2xxx_old.h.
#define CAN2RDA (*(REG32 *)(LPC_CAN2_BASE + 0x28)) |
Definition at line 1381 of file lpc2xxx_old.h.
#define CAN2RDB (*(REG32 *)(LPC_CAN2_BASE + 0x2C)) |
Definition at line 1382 of file lpc2xxx_old.h.
#define CAN2RFS (*(REG32 *)(LPC_CAN2_BASE + 0x20)) |
Definition at line 1379 of file lpc2xxx_old.h.
#define CAN2RID (*(REG32 *)(LPC_CAN2_BASE + 0x24)) |
Definition at line 1380 of file lpc2xxx_old.h.
#define CAN2SR (*(REG32 *)(LPC_CAN2_BASE + 0x1C)) |
Definition at line 1378 of file lpc2xxx_old.h.
#define CAN2TDA1 (*(REG32 *)(LPC_CAN2_BASE + 0x38)) |
Definition at line 1386 of file lpc2xxx_old.h.
#define CAN2TDA2 (*(REG32 *)(LPC_CAN2_BASE + 0x48)) |
Definition at line 1390 of file lpc2xxx_old.h.
#define CAN2TDA3 (*(REG32 *)(LPC_CAN2_BASE + 0x58)) |
Definition at line 1394 of file lpc2xxx_old.h.
#define CAN2TDB1 (*(REG32 *)(LPC_CAN2_BASE + 0x3C)) |
Definition at line 1387 of file lpc2xxx_old.h.
#define CAN2TDB2 (*(REG32 *)(LPC_CAN2_BASE + 0x4C)) |
Definition at line 1391 of file lpc2xxx_old.h.
#define CAN2TDB3 (*(REG32 *)(LPC_CAN2_BASE + 0x5C)) |
Definition at line 1395 of file lpc2xxx_old.h.
#define CAN2TFI1 (*(REG32 *)(LPC_CAN2_BASE + 0x30)) |
Definition at line 1384 of file lpc2xxx_old.h.
#define CAN2TFI2 (*(REG32 *)(LPC_CAN2_BASE + 0x40)) |
Definition at line 1388 of file lpc2xxx_old.h.
#define CAN2TFI3 (*(REG32 *)(LPC_CAN2_BASE + 0x50)) |
Definition at line 1392 of file lpc2xxx_old.h.
#define CAN2TID1 (*(REG32 *)(LPC_CAN2_BASE + 0x34)) |
Definition at line 1385 of file lpc2xxx_old.h.
#define CAN2TID2 (*(REG32 *)(LPC_CAN2_BASE + 0x44)) |
Definition at line 1389 of file lpc2xxx_old.h.
#define CAN2TID3 (*(REG32 *)(LPC_CAN2_BASE + 0x54)) |
Definition at line 1393 of file lpc2xxx_old.h.
#define CAN_AFMR (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x00)) |
Definition at line 1327 of file lpc2xxx_old.h.
#define CAN_EFF_GRP_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x10)) |
Definition at line 1331 of file lpc2xxx_old.h.
#define CAN_EFF_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x0C)) |
Definition at line 1330 of file lpc2xxx_old.h.
#define CAN_EOT (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x14)) |
Definition at line 1332 of file lpc2xxx_old.h.
#define CAN_LUT_ERR (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x1C)) |
Definition at line 1334 of file lpc2xxx_old.h.
#define CAN_LUT_ERR_ADR (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x18)) |
Definition at line 1333 of file lpc2xxx_old.h.
#define CAN_MSR (*(REG32 *)(LPC_CAN_CENTRAL_BASE + 0x08)) |
Definition at line 1342 of file lpc2xxx_old.h.
#define CAN_RX_SR (*(REG32 *)(LPC_CAN_CENTRAL_BASE + 0x04)) |
Definition at line 1341 of file lpc2xxx_old.h.
#define CAN_SFF_GRP_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x08)) |
Definition at line 1329 of file lpc2xxx_old.h.
#define CAN_SFF_SA (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x04)) |
Definition at line 1328 of file lpc2xxx_old.h.
#define CAN_TX_SR (*(REG32 *)(LPC_CAN_CENTRAL_BASE + 0x00)) |
Definition at line 1340 of file lpc2xxx_old.h.
Definition at line 354 of file lpc2xxx_old.h.
#define CCR_Off 0x28 |
Definition at line 390 of file lpc2xxx_old.h.
Definition at line 356 of file lpc2xxx_old.h.
#define CMD_CODE (*(REG32*)(USB_BASE + 0x10)) |
Definition at line 1430 of file lpc2xxx_old.h.
#define CMD_DATA (*(REG32*)(USB_BASE + 0x14)) |
Definition at line 1431 of file lpc2xxx_old.h.
#define CR0_Off 0x2C |
Definition at line 391 of file lpc2xxx_old.h.
#define CR1_Off 0x30 |
Definition at line 392 of file lpc2xxx_old.h.
#define CR2_Off 0x34 |
Definition at line 393 of file lpc2xxx_old.h.
#define CR3_Off 0x38 |
Definition at line 394 of file lpc2xxx_old.h.
Definition at line 370 of file lpc2xxx_old.h.
#define CTCR_Off 0x70 |
Definition at line 396 of file lpc2xxx_old.h.
#define DACR (*(REG32*)(LPC_DAC_BASE + 0x0)) |
Definition at line 1195 of file lpc2xxx_old.h.
#define DEV_INT_CLR (*(REG32*)(USB_BASE + 0x08)) |
Definition at line 1410 of file lpc2xxx_old.h.
#define DEV_INT_EN (*(REG32*)(USB_BASE + 0x04)) |
Definition at line 1409 of file lpc2xxx_old.h.
#define DEV_INT_PRIO (*(REG32*)(USB_BASE + 0x2C)) |
Definition at line 1412 of file lpc2xxx_old.h.
#define DEV_INT_SET (*(REG32*)(USB_BASE + 0x0C)) |
Definition at line 1411 of file lpc2xxx_old.h.
#define DEV_INT_STAT (*(REG32*)(USB_BASE + 0x00)) |
Definition at line 1408 of file lpc2xxx_old.h.
#define DMA_INT_EN (*(REG32*)(USB_BASE + 0x94)) |
Definition at line 1450 of file lpc2xxx_old.h.
#define DMA_INT_STAT (*(REG32*)(USB_BASE + 0x90)) |
Definition at line 1449 of file lpc2xxx_old.h.
#define DMA_REQ_CLR (*(REG32*)(USB_BASE + 0x54)) |
Definition at line 1443 of file lpc2xxx_old.h.
#define DMA_REQ_SET (*(REG32*)(USB_BASE + 0x58)) |
Definition at line 1444 of file lpc2xxx_old.h.
#define DMA_REQ_STAT (*(REG32*)(USB_BASE + 0x50)) |
Definition at line 1442 of file lpc2xxx_old.h.
#define EMC_CONFIG (*(REG32 *)(LPC_EMC_BASE + 0x008)) |
Definition at line 1524 of file lpc2xxx_old.h.
#define EMC_CTRL (*(REG32 *)(LPC_EMC_BASE + 0x000)) |
Definition at line 1522 of file lpc2xxx_old.h.
#define EMC_DYN_APR (*(REG32 *)(LPC_EMC_BASE + 0x03C)) |
Definition at line 1533 of file lpc2xxx_old.h.
#define EMC_DYN_CFG0 (*(REG32 *)(LPC_EMC_BASE + 0x100)) |
Definition at line 1542 of file lpc2xxx_old.h.
#define EMC_DYN_CFG1 (*(REG32 *)(LPC_EMC_BASE + 0x140)) |
Definition at line 1544 of file lpc2xxx_old.h.
#define EMC_DYN_CFG2 (*(REG32 *)(LPC_EMC_BASE + 0x160)) |
Definition at line 1546 of file lpc2xxx_old.h.
#define EMC_DYN_CFG3 (*(REG32 *)(LPC_EMC_BASE + 0x180)) |
Definition at line 1548 of file lpc2xxx_old.h.
#define EMC_DYN_CTRL (*(REG32 *)(LPC_EMC_BASE + 0x020)) |
Definition at line 1527 of file lpc2xxx_old.h.
#define EMC_DYN_DAL (*(REG32 *)(LPC_EMC_BASE + 0x040)) |
Definition at line 1534 of file lpc2xxx_old.h.
#define EMC_DYN_MRD (*(REG32 *)(LPC_EMC_BASE + 0x058)) |
Definition at line 1540 of file lpc2xxx_old.h.
#define EMC_DYN_RAS (*(REG32 *)(LPC_EMC_BASE + 0x034)) |
Definition at line 1531 of file lpc2xxx_old.h.
#define EMC_DYN_RASCAS0 (*(REG32 *)(LPC_EMC_BASE + 0x104)) |
Definition at line 1543 of file lpc2xxx_old.h.
#define EMC_DYN_RASCAS1 (*(REG32 *)(LPC_EMC_BASE + 0x144)) |
Definition at line 1545 of file lpc2xxx_old.h.
#define EMC_DYN_RASCAS2 (*(REG32 *)(LPC_EMC_BASE + 0x164)) |
Definition at line 1547 of file lpc2xxx_old.h.
#define EMC_DYN_RASCAS3 (*(REG32 *)(LPC_EMC_BASE + 0x184)) |
Definition at line 1549 of file lpc2xxx_old.h.
#define EMC_DYN_RC (*(REG32 *)(LPC_EMC_BASE + 0x048)) |
Definition at line 1536 of file lpc2xxx_old.h.
#define EMC_DYN_RD_CFG (*(REG32 *)(LPC_EMC_BASE + 0x028)) |
Definition at line 1529 of file lpc2xxx_old.h.
#define EMC_DYN_RFC (*(REG32 *)(LPC_EMC_BASE + 0x04C)) |
Definition at line 1537 of file lpc2xxx_old.h.
#define EMC_DYN_RFSH (*(REG32 *)(LPC_EMC_BASE + 0x024)) |
Definition at line 1528 of file lpc2xxx_old.h.
#define EMC_DYN_RP (*(REG32 *)(LPC_EMC_BASE + 0x030)) |
Definition at line 1530 of file lpc2xxx_old.h.
#define EMC_DYN_RRD (*(REG32 *)(LPC_EMC_BASE + 0x054)) |
Definition at line 1539 of file lpc2xxx_old.h.
#define EMC_DYN_SREX (*(REG32 *)(LPC_EMC_BASE + 0x038)) |
Definition at line 1532 of file lpc2xxx_old.h.
#define EMC_DYN_WR (*(REG32 *)(LPC_EMC_BASE + 0x044)) |
Definition at line 1535 of file lpc2xxx_old.h.
#define EMC_DYN_XSR (*(REG32 *)(LPC_EMC_BASE + 0x050)) |
Definition at line 1538 of file lpc2xxx_old.h.
#define EMC_STAT (*(REG32 *)(LPC_EMC_BASE + 0x004)) |
Definition at line 1523 of file lpc2xxx_old.h.
#define EMR_Off 0x3C |
Definition at line 395 of file lpc2xxx_old.h.
#define EOT_INT_CLR (*(REG32*)(USB_BASE + 0xA4)) |
Definition at line 1452 of file lpc2xxx_old.h.
#define EOT_INT_SET (*(REG32*)(USB_BASE + 0xA8)) |
Definition at line 1453 of file lpc2xxx_old.h.
#define EOT_INT_STAT (*(REG32*)(USB_BASE + 0xA0)) |
Definition at line 1451 of file lpc2xxx_old.h.
#define EP_DMA_DIS (*(REG32*)(USB_BASE + 0x8C)) |
Definition at line 1448 of file lpc2xxx_old.h.
#define EP_DMA_EN (*(REG32*)(USB_BASE + 0x88)) |
Definition at line 1447 of file lpc2xxx_old.h.
#define EP_DMA_STAT (*(REG32*)(USB_BASE + 0x84)) |
Definition at line 1446 of file lpc2xxx_old.h.
#define EP_INDEX (*(REG32*)(USB_BASE + 0x48)) |
Definition at line 1425 of file lpc2xxx_old.h.
#define EP_INT_CLR (*(REG32*)(USB_BASE + 0x38)) |
Definition at line 1418 of file lpc2xxx_old.h.
#define EP_INT_EN (*(REG32*)(USB_BASE + 0x34)) |
Definition at line 1417 of file lpc2xxx_old.h.
#define EP_INT_PRIO (*(REG32*)(USB_BASE + 0x40)) |
Definition at line 1420 of file lpc2xxx_old.h.
#define EP_INT_SET (*(REG32*)(USB_BASE + 0x3C)) |
Definition at line 1419 of file lpc2xxx_old.h.
#define EP_INT_STAT (*(REG32*)(USB_BASE + 0x30)) |
Definition at line 1416 of file lpc2xxx_old.h.
Definition at line 361 of file lpc2xxx_old.h.
Definition at line 363 of file lpc2xxx_old.h.
Definition at line 364 of file lpc2xxx_old.h.
#define FCANIC0 (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x24)) |
Definition at line 1336 of file lpc2xxx_old.h.
#define FCANIC1 (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x28)) |
Definition at line 1337 of file lpc2xxx_old.h.
#define FCANIE (*(REG32 *)(LPC_CAN_ACCEPT_BASE + 0x20)) |
Definition at line 1335 of file lpc2xxx_old.h.
#define FIO0CLR FIOREG_BASE_ADDR_n(0,0x1C) |
Definition at line 647 of file lpc2xxx_old.h.
#define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x1C)) |
Definition at line 850 of file lpc2xxx_old.h.
#define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x1D)) |
Definition at line 856 of file lpc2xxx_old.h.
#define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x1E)) |
Definition at line 862 of file lpc2xxx_old.h.
#define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x1F)) |
Definition at line 868 of file lpc2xxx_old.h.
#define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE + 0x1E)) |
Definition at line 874 of file lpc2xxx_old.h.
#define FIO0DIR FIOREG_BASE_ADDR_n(0,0) |
Definition at line 643 of file lpc2xxx_old.h.
#define FIO0DIR0 FIOREG_BASE_ADDR_n8(0,0) |
Definition at line 696 of file lpc2xxx_old.h.
#define FIO0DIR1 FIOREG_BASE_ADDR_n8(0,1) |
Definition at line 702 of file lpc2xxx_old.h.
#define FIO0DIR2 FIOREG_BASE_ADDR_n8(0,2) |
Definition at line 708 of file lpc2xxx_old.h.
#define FIO0DIR3 FIOREG_BASE_ADDR_n8(0,3) |
Definition at line 714 of file lpc2xxx_old.h.
#define FIO0DIRL FIOREG_BASE_ADDR_n16(0,0) |
Definition at line 720 of file lpc2xxx_old.h.
#define FIO0DIRU FIOREG_BASE_ADDR_n16(0,2) |
Definition at line 726 of file lpc2xxx_old.h.
#define FIO0MASK FIOREG_BASE_ADDR_n(0,0x10) |
Definition at line 644 of file lpc2xxx_old.h.
#define FIO0MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(0,0) |
Definition at line 735 of file lpc2xxx_old.h.
#define FIO0MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(0,1) |
Definition at line 741 of file lpc2xxx_old.h.
#define FIO0MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(0,2) |
Definition at line 747 of file lpc2xxx_old.h.
#define FIO0MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(0,3) |
Definition at line 753 of file lpc2xxx_old.h.
#define FIO0MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(0) |
Definition at line 765 of file lpc2xxx_old.h.
#define FIO0MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(0) |
Definition at line 771 of file lpc2xxx_old.h.
#define FIO0PIN FIOREG_BASE_ADDR_n(0,0x14) |
Definition at line 645 of file lpc2xxx_old.h.
#define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x14)) |
Definition at line 778 of file lpc2xxx_old.h.
#define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x15)) |
Definition at line 784 of file lpc2xxx_old.h.
#define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x16)) |
Definition at line 790 of file lpc2xxx_old.h.
#define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x17)) |
Definition at line 796 of file lpc2xxx_old.h.
#define FIO0PINL (*(volatile unsigned short *)(FIO_BASE + 0x14)) |
Definition at line 802 of file lpc2xxx_old.h.
#define FIO0PINU (*(volatile unsigned short *)(FIO_BASE + 0x16)) |
Definition at line 808 of file lpc2xxx_old.h.
#define FIO0SET FIOREG_BASE_ADDR_n(0,0x18) |
Definition at line 646 of file lpc2xxx_old.h.
#define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE + 0x18)) |
Definition at line 814 of file lpc2xxx_old.h.
#define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE + 0x19)) |
Definition at line 820 of file lpc2xxx_old.h.
#define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE + 0x1A)) |
Definition at line 826 of file lpc2xxx_old.h.
#define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE + 0x1B)) |
Definition at line 832 of file lpc2xxx_old.h.
#define FIO0SETL (*(volatile unsigned short *)(FIO_BASE + 0x18)) |
Definition at line 838 of file lpc2xxx_old.h.
#define FIO0SETU (*(volatile unsigned short *)(FIO_BASE + 0x1A)) |
Definition at line 844 of file lpc2xxx_old.h.
#define FIO1CLR FIOREG_BASE_ADDR_n(1,0x1C) |
Definition at line 674 of file lpc2xxx_old.h.
#define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x3C)) |
Definition at line 851 of file lpc2xxx_old.h.
#define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x2D)) |
Definition at line 857 of file lpc2xxx_old.h.
#define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x3E)) |
Definition at line 863 of file lpc2xxx_old.h.
#define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x3F)) |
Definition at line 869 of file lpc2xxx_old.h.
#define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE + 0x3E)) |
Definition at line 875 of file lpc2xxx_old.h.
#define FIO1DIR FIOREG_BASE_ADDR_n(1,0) |
Definition at line 670 of file lpc2xxx_old.h.
#define FIO1DIR0 FIOREG_BASE_ADDR_n8(1,0) |
Definition at line 697 of file lpc2xxx_old.h.
#define FIO1DIR1 FIOREG_BASE_ADDR_n8(1,1) |
Definition at line 703 of file lpc2xxx_old.h.
#define FIO1DIR2 FIOREG_BASE_ADDR_n8(1,2) |
Definition at line 709 of file lpc2xxx_old.h.
#define FIO1DIR3 FIOREG_BASE_ADDR_n8(1,3) |
Definition at line 715 of file lpc2xxx_old.h.
#define FIO1DIRL FIOREG_BASE_ADDR_n16(1,0) |
Definition at line 721 of file lpc2xxx_old.h.
#define FIO1DIRU FIOREG_BASE_ADDR_n16(1,2) |
Definition at line 727 of file lpc2xxx_old.h.
#define FIO1MASK FIOREG_BASE_ADDR_n(1,0x10) |
Definition at line 671 of file lpc2xxx_old.h.
#define FIO1MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(1,0) |
Definition at line 736 of file lpc2xxx_old.h.
#define FIO1MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(1,1) |
Definition at line 742 of file lpc2xxx_old.h.
#define FIO1MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(1,2) |
Definition at line 748 of file lpc2xxx_old.h.
#define FIO1MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(1,3) |
Definition at line 754 of file lpc2xxx_old.h.
#define FIO1MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(1) |
Definition at line 766 of file lpc2xxx_old.h.
#define FIO1MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(1) |
Definition at line 772 of file lpc2xxx_old.h.
#define FIO1PIN FIOREG_BASE_ADDR_n(1,0x14) |
Definition at line 672 of file lpc2xxx_old.h.
#define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x34)) |
Definition at line 779 of file lpc2xxx_old.h.
#define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x35)) |
Definition at line 785 of file lpc2xxx_old.h.
#define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x36)) |
Definition at line 791 of file lpc2xxx_old.h.
#define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x37)) |
Definition at line 797 of file lpc2xxx_old.h.
#define FIO1PINL (*(volatile unsigned short *)(FIO_BASE + 0x34)) |
Definition at line 803 of file lpc2xxx_old.h.
#define FIO1PINU (*(volatile unsigned short *)(FIO_BASE + 0x36)) |
Definition at line 809 of file lpc2xxx_old.h.
#define FIO1SET FIOREG_BASE_ADDR_n(1,0x18) |
Definition at line 673 of file lpc2xxx_old.h.
#define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE + 0x38)) |
Definition at line 815 of file lpc2xxx_old.h.
#define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE + 0x29)) |
Definition at line 821 of file lpc2xxx_old.h.
#define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE + 0x3A)) |
Definition at line 827 of file lpc2xxx_old.h.
#define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE + 0x3B)) |
Definition at line 833 of file lpc2xxx_old.h.
#define FIO1SETL (*(volatile unsigned short *)(FIO_BASE + 0x38)) |
Definition at line 839 of file lpc2xxx_old.h.
#define FIO1SETU (*(volatile unsigned short *)(FIO_BASE + 0x3A)) |
Definition at line 845 of file lpc2xxx_old.h.
#define FIO2CLR FIOREG_BASE_ADDR_n(2,0x1C) |
Definition at line 680 of file lpc2xxx_old.h.
#define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x5C)) |
Definition at line 852 of file lpc2xxx_old.h.
#define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x5D)) |
Definition at line 858 of file lpc2xxx_old.h.
#define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x5E)) |
Definition at line 864 of file lpc2xxx_old.h.
#define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x5F)) |
Definition at line 870 of file lpc2xxx_old.h.
#define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE + 0x5E)) |
Definition at line 876 of file lpc2xxx_old.h.
#define FIO2DIR FIOREG_BASE_ADDR_n(2,0) |
Definition at line 676 of file lpc2xxx_old.h.
#define FIO2DIR0 FIOREG_BASE_ADDR_n8(2,0) |
Definition at line 698 of file lpc2xxx_old.h.
#define FIO2DIR1 FIOREG_BASE_ADDR_n8(2,1) |
Definition at line 704 of file lpc2xxx_old.h.
#define FIO2DIR2 FIOREG_BASE_ADDR_n8(2,2) |
Definition at line 710 of file lpc2xxx_old.h.
#define FIO2DIR3 FIOREG_BASE_ADDR_n8(2,3) |
Definition at line 716 of file lpc2xxx_old.h.
#define FIO2DIRL FIOREG_BASE_ADDR_n16(2,0) |
Definition at line 722 of file lpc2xxx_old.h.
#define FIO2DIRU FIOREG_BASE_ADDR_n16(2,2) |
Definition at line 728 of file lpc2xxx_old.h.
#define FIO2MASK FIOREG_BASE_ADDR_n(2,0x10) |
Definition at line 677 of file lpc2xxx_old.h.
#define FIO2MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(2,0) |
Definition at line 737 of file lpc2xxx_old.h.
#define FIO2MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(2,1) |
Definition at line 743 of file lpc2xxx_old.h.
#define FIO2MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(2,2) |
Definition at line 749 of file lpc2xxx_old.h.
#define FIO2MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(2,3) |
Definition at line 755 of file lpc2xxx_old.h.
#define FIO2MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(2) |
Definition at line 767 of file lpc2xxx_old.h.
#define FIO2MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(2) |
Definition at line 773 of file lpc2xxx_old.h.
#define FIO2PIN FIOREG_BASE_ADDR_n(2,0x14) |
Definition at line 678 of file lpc2xxx_old.h.
#define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x54)) |
Definition at line 780 of file lpc2xxx_old.h.
#define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x55)) |
Definition at line 786 of file lpc2xxx_old.h.
#define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x56)) |
Definition at line 792 of file lpc2xxx_old.h.
#define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x57)) |
Definition at line 798 of file lpc2xxx_old.h.
#define FIO2PINL (*(volatile unsigned short *)(FIO_BASE + 0x54)) |
Definition at line 804 of file lpc2xxx_old.h.
#define FIO2PINU (*(volatile unsigned short *)(FIO_BASE + 0x56)) |
Definition at line 810 of file lpc2xxx_old.h.
#define FIO2SET FIOREG_BASE_ADDR_n(2,0x18) |
Definition at line 679 of file lpc2xxx_old.h.
#define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE + 0x58)) |
Definition at line 816 of file lpc2xxx_old.h.
#define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE + 0x59)) |
Definition at line 822 of file lpc2xxx_old.h.
#define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE + 0x5A)) |
Definition at line 828 of file lpc2xxx_old.h.
#define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE + 0x5B)) |
Definition at line 834 of file lpc2xxx_old.h.
#define FIO2SETL (*(volatile unsigned short *)(FIO_BASE + 0x58)) |
Definition at line 840 of file lpc2xxx_old.h.
#define FIO2SETU (*(volatile unsigned short *)(FIO_BASE + 0x5A)) |
Definition at line 846 of file lpc2xxx_old.h.
#define FIO3CLR FIOREG_BASE_ADDR_n(3,0x1C) |
Definition at line 686 of file lpc2xxx_old.h.
#define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x7C)) |
Definition at line 853 of file lpc2xxx_old.h.
#define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x7D)) |
Definition at line 859 of file lpc2xxx_old.h.
#define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x7E)) |
Definition at line 865 of file lpc2xxx_old.h.
#define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x7F)) |
Definition at line 871 of file lpc2xxx_old.h.
#define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE + 0x7E)) |
Definition at line 877 of file lpc2xxx_old.h.
#define FIO3DIR FIOREG_BASE_ADDR_n(3,0) |
Definition at line 682 of file lpc2xxx_old.h.
#define FIO3DIR0 FIOREG_BASE_ADDR_n8(3,0) |
Definition at line 699 of file lpc2xxx_old.h.
#define FIO3DIR1 FIOREG_BASE_ADDR_n8(3,1) |
Definition at line 705 of file lpc2xxx_old.h.
#define FIO3DIR2 FIOREG_BASE_ADDR_n8(3,2) |
Definition at line 711 of file lpc2xxx_old.h.
#define FIO3DIR3 FIOREG_BASE_ADDR_n8(3,3) |
Definition at line 717 of file lpc2xxx_old.h.
#define FIO3DIRL FIOREG_BASE_ADDR_n16(3,0) |
Definition at line 723 of file lpc2xxx_old.h.
#define FIO3DIRU FIOREG_BASE_ADDR_n16(3,2) |
Definition at line 729 of file lpc2xxx_old.h.
#define FIO3MASK FIOREG_BASE_ADDR_n(3,0x10) |
Definition at line 683 of file lpc2xxx_old.h.
#define FIO3MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(3,0) |
Definition at line 738 of file lpc2xxx_old.h.
#define FIO3MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(3,1) |
Definition at line 744 of file lpc2xxx_old.h.
#define FIO3MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(3,2) |
Definition at line 750 of file lpc2xxx_old.h.
#define FIO3MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(3,3) |
Definition at line 756 of file lpc2xxx_old.h.
#define FIO3MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(3) |
Definition at line 768 of file lpc2xxx_old.h.
#define FIO3MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(3) |
Definition at line 774 of file lpc2xxx_old.h.
#define FIO3PIN FIOREG_BASE_ADDR_n(3,0x14) |
Definition at line 684 of file lpc2xxx_old.h.
#define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x74)) |
Definition at line 781 of file lpc2xxx_old.h.
#define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x75)) |
Definition at line 787 of file lpc2xxx_old.h.
#define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x76)) |
Definition at line 793 of file lpc2xxx_old.h.
#define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x77)) |
Definition at line 799 of file lpc2xxx_old.h.
#define FIO3PINL (*(volatile unsigned short *)(FIO_BASE + 0x74)) |
Definition at line 805 of file lpc2xxx_old.h.
#define FIO3PINU (*(volatile unsigned short *)(FIO_BASE + 0x76)) |
Definition at line 811 of file lpc2xxx_old.h.
#define FIO3SET FIOREG_BASE_ADDR_n(3,0x18) |
Definition at line 685 of file lpc2xxx_old.h.
#define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE + 0x78)) |
Definition at line 817 of file lpc2xxx_old.h.
#define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE + 0x79)) |
Definition at line 823 of file lpc2xxx_old.h.
#define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE + 0x7A)) |
Definition at line 829 of file lpc2xxx_old.h.
#define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE + 0x7B)) |
Definition at line 835 of file lpc2xxx_old.h.
#define FIO3SETL (*(volatile unsigned short *)(FIO_BASE + 0x78)) |
Definition at line 841 of file lpc2xxx_old.h.
#define FIO3SETU (*(volatile unsigned short *)(FIO_BASE + 0x7A)) |
Definition at line 847 of file lpc2xxx_old.h.
#define FIO4CLR FIOREG_BASE_ADDR_n(4,0x1C) |
Definition at line 692 of file lpc2xxx_old.h.
#define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE + 0x9C)) |
Definition at line 854 of file lpc2xxx_old.h.
#define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE + 0x9D)) |
Definition at line 860 of file lpc2xxx_old.h.
#define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE + 0x9E)) |
Definition at line 866 of file lpc2xxx_old.h.
#define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE + 0x9F)) |
Definition at line 872 of file lpc2xxx_old.h.
#define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE + 0x9E)) |
Definition at line 878 of file lpc2xxx_old.h.
#define FIO4DIR FIOREG_BASE_ADDR_n(4,0) |
Definition at line 688 of file lpc2xxx_old.h.
#define FIO4DIR0 FIOREG_FIOREG_BASE_ADDR_n8BASE_ADDR_n8(4,0) |
Definition at line 700 of file lpc2xxx_old.h.
#define FIO4DIR1 FIOREG_BASE_ADDR_n8(4,1) |
Definition at line 706 of file lpc2xxx_old.h.
#define FIO4DIR2 FIOREG_BASE_ADDR_n8(4,2) |
Definition at line 712 of file lpc2xxx_old.h.
#define FIO4DIR3 FIOREG_BASE_ADDR_n8(4,3) |
Definition at line 718 of file lpc2xxx_old.h.
#define FIO4DIRL FIOREG_BASE_ADDR_n16(4,0) |
Definition at line 724 of file lpc2xxx_old.h.
#define FIO4DIRU FIOREG_BASE_ADDR_n16(4,2) |
Definition at line 730 of file lpc2xxx_old.h.
#define FIO4MASK FIOREG_BASE_ADDR_n(4,0x10) |
Definition at line 689 of file lpc2xxx_old.h.
#define FIO4MASK0 FIOREG_BASE_ADDR_n8_FIOMASK(4,0) |
Definition at line 739 of file lpc2xxx_old.h.
#define FIO4MASK1 FIOREG_BASE_ADDR_n8_FIOMASK(4,1) |
Definition at line 745 of file lpc2xxx_old.h.
#define FIO4MASK2 FIOREG_BASE_ADDR_n8_FIOMASK(4,2) |
Definition at line 751 of file lpc2xxx_old.h.
#define FIO4MASK3 FIOREG_BASE_ADDR_n8_FIOMASK(4,3) |
Definition at line 757 of file lpc2xxx_old.h.
#define FIO4MASKL FIOREG_BASE_ADDR_n16_FIOMASKL(4) |
Definition at line 769 of file lpc2xxx_old.h.
#define FIO4MASKU FIOREG_BASE_ADDR_n16_FIOMASKU(4) |
Definition at line 775 of file lpc2xxx_old.h.
#define FIO4PIN FIOREG_BASE_ADDR_n(4,0x14) |
Definition at line 690 of file lpc2xxx_old.h.
#define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE + 0x94)) |
Definition at line 782 of file lpc2xxx_old.h.
#define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE + 0x95)) |
Definition at line 788 of file lpc2xxx_old.h.
#define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE + 0x96)) |
Definition at line 794 of file lpc2xxx_old.h.
#define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE + 0x97)) |
Definition at line 800 of file lpc2xxx_old.h.
#define FIO4PINL (*(volatile unsigned short *)(FIO_BASE + 0x94)) |
Definition at line 806 of file lpc2xxx_old.h.
#define FIO4PINU (*(volatile unsigned short *)(FIO_BASE + 0x96)) |
Definition at line 812 of file lpc2xxx_old.h.
#define FIO4SET FIOREG_BASE_ADDR_n(4,0x18) |
Definition at line 691 of file lpc2xxx_old.h.
#define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE + 0x98)) |
Definition at line 818 of file lpc2xxx_old.h.
#define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE + 0x99)) |
Definition at line 824 of file lpc2xxx_old.h.
#define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE + 0x9A)) |
Definition at line 830 of file lpc2xxx_old.h.
#define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE + 0x9B)) |
Definition at line 836 of file lpc2xxx_old.h.
#define FIO4SETL (*(volatile unsigned short *)(FIO_BASE + 0x98)) |
Definition at line 842 of file lpc2xxx_old.h.
#define FIO4SETU (*(volatile unsigned short *)(FIO_BASE + 0x9A)) |
Definition at line 848 of file lpc2xxx_old.h.
#define FIO_BASE LPC_FIO_BASE |
Definition at line 777 of file lpc2xxx_old.h.
#define FIOREG_BASE_ADDR_n | ( | n, | |
off | |||
) | (*(REG32*)(LPC_FIO_BASE + (n<<5)+ off)) |
Definition at line 639 of file lpc2xxx_old.h.
#define FIOREG_BASE_ADDR_n16 | ( | n, | |
off | |||
) | (*(REG16*)(LPC_FIO_BASE + (n<<5)+ off)) |
Definition at line 640 of file lpc2xxx_old.h.
#define FIOREG_BASE_ADDR_n16_FIOMASKL | ( | letter1 | ) | FIOREG_BASE_ADDR_n16(letter1,0x10) |
Definition at line 759 of file lpc2xxx_old.h.
#define FIOREG_BASE_ADDR_n16_FIOMASKU | ( | letter1 | ) | FIOREG_BASE_ADDR_n16(letter1,0x12) |
Definition at line 762 of file lpc2xxx_old.h.
#define FIOREG_BASE_ADDR_n8 | ( | n, | |
off | |||
) | (*(REG8*)(LPC_FIO_BASE + (n<<5)+ off)) |
Definition at line 641 of file lpc2xxx_old.h.
#define FIOREG_BASE_ADDR_n8_FIOMASK | ( | letter1, | |
letter2 | |||
) | FIOREG_BASE_ADDR_n8(letter1,0x10+letter2) |
Definition at line 732 of file lpc2xxx_old.h.
#define GPDMA_CH0_CFG (*(REG32*)(LPC_GPDMA_BASE + 0x110)) |
Definition at line 1315 of file lpc2xxx_old.h.
#define GPDMA_CH0_CTRL (*(REG32*)(LPC_GPDMA_BASE + 0x10C)) |
Definition at line 1314 of file lpc2xxx_old.h.
#define GPDMA_CH0_DEST (*(REG32*)(LPC_GPDMA_BASE + 0x104)) |
Definition at line 1312 of file lpc2xxx_old.h.
#define GPDMA_CH0_LLI (*(REG32*)(LPC_GPDMA_BASE + 0x108)) |
Definition at line 1313 of file lpc2xxx_old.h.
#define GPDMA_CH0_SRC (*(REG32*)(LPC_GPDMA_BASE + 0x100)) |
Definition at line 1311 of file lpc2xxx_old.h.
#define GPDMA_CH1_CFG (*(REG32*)(LPC_GPDMA_BASE + 0x130)) |
Definition at line 1322 of file lpc2xxx_old.h.
#define GPDMA_CH1_CTRL (*(REG32*)(LPC_GPDMA_BASE + 0x12C)) |
Definition at line 1321 of file lpc2xxx_old.h.
#define GPDMA_CH1_DEST (*(REG32*)(LPC_GPDMA_BASE + 0x124)) |
Definition at line 1319 of file lpc2xxx_old.h.
#define GPDMA_CH1_LLI (*(REG32*)(LPC_GPDMA_BASE + 0x128)) |
Definition at line 1320 of file lpc2xxx_old.h.
#define GPDMA_CH1_SRC (*(REG32*)(LPC_GPDMA_BASE + 0x120)) |
Definition at line 1318 of file lpc2xxx_old.h.
#define GPDMA_CONFIG (*(REG32*)(LPC_GPDMA_BASE + 0x030)) |
Definition at line 1307 of file lpc2xxx_old.h.
#define GPDMA_ENABLED_CHNS (*(REG32*)(LPC_GPDMA_BASE + 0x01C)) |
Definition at line 1302 of file lpc2xxx_old.h.
#define GPDMA_INT_ERR_CLR (*(REG32*)(LPC_GPDMA_BASE + 0x010)) |
Definition at line 1299 of file lpc2xxx_old.h.
#define GPDMA_INT_ERR_STAT (*(REG32*)(LPC_GPDMA_BASE + 0x00C)) |
Definition at line 1298 of file lpc2xxx_old.h.
#define GPDMA_INT_STAT (*(REG32*)(LPC_GPDMA_BASE + 0x000)) |
Definition at line 1295 of file lpc2xxx_old.h.
#define GPDMA_INT_TCCLR (*(REG32*)(LPC_GPDMA_BASE + 0x008)) |
Definition at line 1297 of file lpc2xxx_old.h.
#define GPDMA_INT_TCSTAT (*(REG32*)(LPC_GPDMA_BASE + 0x004)) |
Definition at line 1296 of file lpc2xxx_old.h.
#define GPDMA_RAW_INT_ERR_STAT (*(REG32*)(LPC_GPDMA_BASE + 0x018)) |
Definition at line 1301 of file lpc2xxx_old.h.
#define GPDMA_RAW_INT_TCSTAT (*(REG32*)(LPC_GPDMA_BASE + 0x014)) |
Definition at line 1300 of file lpc2xxx_old.h.
#define GPDMA_SOFT_BREQ (*(REG32*)(LPC_GPDMA_BASE + 0x020)) |
Definition at line 1303 of file lpc2xxx_old.h.
#define GPDMA_SOFT_LBREQ (*(REG32*)(LPC_GPDMA_BASE + 0x028)) |
Definition at line 1305 of file lpc2xxx_old.h.
#define GPDMA_SOFT_LSREQ (*(REG32*)(LPC_GPDMA_BASE + 0x02C)) |
Definition at line 1306 of file lpc2xxx_old.h.
#define GPDMA_SOFT_SREQ (*(REG32*)(LPC_GPDMA_BASE + 0x024)) |
Definition at line 1304 of file lpc2xxx_old.h.
#define GPDMA_SYNC (*(REG32*)(LPC_GPDMA_BASE + 0x034)) |
Definition at line 1308 of file lpc2xxx_old.h.
#define GPIO_BASE LPC_GPIO_BASE |
Definition at line 607 of file lpc2xxx_old.h.
#define HC_BULK_CUR_ED (*(REG32*)(LPC_USBHC_BASE + 0x2C)) |
Definition at line 1474 of file lpc2xxx_old.h.
#define HC_BULK_HEAD_ED (*(REG32*)(LPC_USBHC_BASE + 0x28)) |
Definition at line 1473 of file lpc2xxx_old.h.
#define HC_CMD_STAT (*(REG32*)(LPC_USBHC_BASE + 0x08)) |
Definition at line 1465 of file lpc2xxx_old.h.
#define HC_CONTROL (*(REG32*)(LPC_USBHC_BASE + 0x04)) |
Definition at line 1464 of file lpc2xxx_old.h.
#define HC_CTRL_CUR_ED (*(REG32*)(LPC_USBHC_BASE + 0x24)) |
Definition at line 1472 of file lpc2xxx_old.h.
#define HC_CTRL_HEAD_ED (*(REG32*)(LPC_USBHC_BASE + 0x20)) |
Definition at line 1471 of file lpc2xxx_old.h.
#define HC_DONE_HEAD (*(REG32*)(LPC_USBHC_BASE + 0x30)) |
Definition at line 1475 of file lpc2xxx_old.h.
#define HC_FM_INTERVAL (*(REG32*)(LPC_USBHC_BASE + 0x34)) |
Definition at line 1476 of file lpc2xxx_old.h.
#define HC_FM_NUMBER (*(REG32*)(LPC_USBHC_BASE + 0x3C)) |
Definition at line 1478 of file lpc2xxx_old.h.
#define HC_FM_REMAINING (*(REG32*)(LPC_USBHC_BASE + 0x38)) |
Definition at line 1477 of file lpc2xxx_old.h.
#define HC_HCCA (*(REG32*)(LPC_USBHC_BASE + 0x18)) |
Definition at line 1469 of file lpc2xxx_old.h.
#define HC_INT_DIS (*(REG32*)(LPC_USBHC_BASE + 0x14)) |
Definition at line 1468 of file lpc2xxx_old.h.
#define HC_INT_EN (*(REG32*)(LPC_USBHC_BASE + 0x10)) |
Definition at line 1467 of file lpc2xxx_old.h.
#define HC_INT_STAT (*(REG32*)(LPC_USBHC_BASE + 0x0C)) |
Definition at line 1466 of file lpc2xxx_old.h.
#define HC_LS_THRHLD (*(REG32*)(LPC_USBHC_BASE + 0x44)) |
Definition at line 1480 of file lpc2xxx_old.h.
#define HC_PERIOD_CUR_ED (*(REG32*)(LPC_USBHC_BASE + 0x1C)) |
Definition at line 1470 of file lpc2xxx_old.h.
#define HC_PERIOD_START (*(REG32*)(LPC_USBHC_BASE + 0x40)) |
Definition at line 1479 of file lpc2xxx_old.h.
#define HC_REVISION (*(REG32*)(LPC_USBHC_BASE + 0x00)) |
Definition at line 1463 of file lpc2xxx_old.h.
#define HC_RH_DESCA (*(REG32*)(LPC_USBHC_BASE + 0x48)) |
Definition at line 1481 of file lpc2xxx_old.h.
#define HC_RH_DESCB (*(REG32*)(LPC_USBHC_BASE + 0x4C)) |
Definition at line 1482 of file lpc2xxx_old.h.
#define HC_RH_PORT_STAT1 (*(REG32*)(LPC_USBHC_BASE + 0x54)) |
Definition at line 1484 of file lpc2xxx_old.h.
#define HC_RH_PORT_STAT2 (*(REG32*)(LPC_USBHC_BASE + 0x58)) |
Definition at line 1485 of file lpc2xxx_old.h.
#define HC_RH_STAT (*(REG32*)(LPC_USBHC_BASE + 0x50)) |
Definition at line 1483 of file lpc2xxx_old.h.
#define I2S_DAI (*(REG32*)(LPC_I2S_BASE + 0x04)) |
Definition at line 1283 of file lpc2xxx_old.h.
#define I2S_DAO (*(REG32*)(LPC_I2S_BASE + 0x00)) |
Definition at line 1282 of file lpc2xxx_old.h.
#define I2S_DMA1 (*(REG32*)(LPC_I2S_BASE + 0x14)) |
Definition at line 1287 of file lpc2xxx_old.h.
#define I2S_DMA2 (*(REG32*)(LPC_I2S_BASE + 0x18)) |
Definition at line 1288 of file lpc2xxx_old.h.
#define I2S_IRQ (*(REG32*)(LPC_I2S_BASE + 0x1C)) |
Definition at line 1289 of file lpc2xxx_old.h.
#define I2S_RX_FIFO (*(REG32*)(LPC_I2S_BASE + 0x0C)) |
Definition at line 1285 of file lpc2xxx_old.h.
#define I2S_RXRATE (*(REG32*)(LPC_I2S_BASE + 0x24)) |
Definition at line 1291 of file lpc2xxx_old.h.
#define I2S_STATE (*(REG32*)(LPC_I2S_BASE + 0x10)) |
Definition at line 1286 of file lpc2xxx_old.h.
#define I2S_TX_FIFO (*(REG32*)(LPC_I2S_BASE + 0x08)) |
Definition at line 1284 of file lpc2xxx_old.h.
#define I2S_TXRATE (*(REG32*)(LPC_I2S_BASE + 0x20)) |
Definition at line 1290 of file lpc2xxx_old.h.
#define i_MCU_MODEL 0 |
Definition at line 67 of file lpc2xxx_old.h.
Definition at line 362 of file lpc2xxx_old.h.
Definition at line 627 of file lpc2xxx_old.h.
Definition at line 624 of file lpc2xxx_old.h.
Definition at line 623 of file lpc2xxx_old.h.
Definition at line 626 of file lpc2xxx_old.h.
Definition at line 625 of file lpc2xxx_old.h.
Definition at line 633 of file lpc2xxx_old.h.
Definition at line 630 of file lpc2xxx_old.h.
Definition at line 629 of file lpc2xxx_old.h.
Definition at line 632 of file lpc2xxx_old.h.
Definition at line 631 of file lpc2xxx_old.h.
Definition at line 635 of file lpc2xxx_old.h.
#define IOCLR IOCLR0 |
Definition at line 620 of file lpc2xxx_old.h.
Definition at line 611 of file lpc2xxx_old.h.
Definition at line 615 of file lpc2xxx_old.h.
#define IODIR IODIR0 |
Definition at line 619 of file lpc2xxx_old.h.
Definition at line 610 of file lpc2xxx_old.h.
Definition at line 614 of file lpc2xxx_old.h.
#define IOPIN IOPIN0 |
Definition at line 617 of file lpc2xxx_old.h.
Definition at line 608 of file lpc2xxx_old.h.
Definition at line 612 of file lpc2xxx_old.h.
#define IOSET IOSET0 |
Definition at line 618 of file lpc2xxx_old.h.
Definition at line 609 of file lpc2xxx_old.h.
Definition at line 613 of file lpc2xxx_old.h.
#define IR_Off 0x00 |
Definition at line 380 of file lpc2xxx_old.h.
#define IRQn_Type char |
Definition at line 129 of file lpc2xxx_old.h.
#define LPC2XXX_PORT0 0 |
Definition at line 534 of file lpc2xxx_old.h.
#define LPC2XXX_PORT1 1 |
Definition at line 535 of file lpc2xxx_old.h.
#define LPC2XXX_PORT2 2 |
Definition at line 536 of file lpc2xxx_old.h.
#define LPC2XXX_PORT3 3 |
Definition at line 537 of file lpc2xxx_old.h.
#define LPC2XXX_PORT4 4 |
Definition at line 538 of file lpc2xxx_old.h.
#define LPC_T0_BASE LPC_TIM0_BASE |
Definition at line 399 of file lpc2xxx_old.h.
#define LPC_T1_BASE LPC_TIM1_BASE |
Definition at line 402 of file lpc2xxx_old.h.
#define LPC_T2_BASE LPC_TIM2_BASE |
Definition at line 405 of file lpc2xxx_old.h.
#define LPC_T3_BASE LPC_TIM3_BASE |
Definition at line 408 of file lpc2xxx_old.h.
#define MAC_CLRT (*(REG32*)(LPC_MAC_BASE + 0x010)) /* CoLlision window/ReTry reg */ |
Definition at line 1208 of file lpc2xxx_old.h.
#define MAC_COMMAND (*(REG32*)(LPC_MAC_BASE + 0x100)) /* Command reg */ |
Definition at line 1223 of file lpc2xxx_old.h.
#define MAC_FLOWCONTROLCNT (*(REG32*)(LPC_MAC_BASE + 0x170)) /* Flow control counter reg */ |
Definition at line 1240 of file lpc2xxx_old.h.
#define MAC_FLOWCONTROLSTS (*(REG32*)(LPC_MAC_BASE + 0x174)) /* Flow control status reg */ |
Definition at line 1241 of file lpc2xxx_old.h.
#define MAC_HASHFILTERH (*(REG32*)(LPC_MAC_BASE + 0x214)) /* Hash filter MSBs reg */ |
Definition at line 1248 of file lpc2xxx_old.h.
#define MAC_HASHFILTERL (*(REG32*)(LPC_MAC_BASE + 0x210)) /* Hash filter LSBs reg */ |
Definition at line 1247 of file lpc2xxx_old.h.
#define MAC_INTCLEAR (*(REG32*)(LPC_MAC_BASE + 0xFE8)) /* Interrupt clear reg (WO) */ |
Definition at line 1252 of file lpc2xxx_old.h.
#define MAC_INTENABLE (*(REG32*)(LPC_MAC_BASE + 0xFE4)) /* Interrupt enable reg */ |
Definition at line 1251 of file lpc2xxx_old.h.
#define MAC_INTSET (*(REG32*)(LPC_MAC_BASE + 0xFEC)) /* Interrupt set reg (WO) */ |
Definition at line 1253 of file lpc2xxx_old.h.
#define MAC_INTSTATUS (*(REG32*)(LPC_MAC_BASE + 0xFE0)) /* Interrupt status reg (RO) */ |
Definition at line 1250 of file lpc2xxx_old.h.
#define MAC_IPGR (*(REG32*)(LPC_MAC_BASE + 0x00C)) /* non b2b InterPacketGap reg */ |
Definition at line 1207 of file lpc2xxx_old.h.
#define MAC_IPGT (*(REG32*)(LPC_MAC_BASE + 0x008)) /* b2b InterPacketGap reg */ |
Definition at line 1206 of file lpc2xxx_old.h.
#define MAC_MAC1 (*(REG32*)(LPC_MAC_BASE + 0x000)) /* MAC config reg 1 */ |
Definition at line 1204 of file lpc2xxx_old.h.
#define MAC_MAC2 (*(REG32*)(LPC_MAC_BASE + 0x004)) /* MAC config reg 2 */ |
Definition at line 1205 of file lpc2xxx_old.h.
#define MAC_MADR (*(REG32*)(LPC_MAC_BASE + 0x028)) /* MII Mgmt ADdRess reg */ |
Definition at line 1214 of file lpc2xxx_old.h.
#define MAC_MAXF (*(REG32*)(LPC_MAC_BASE + 0x014)) /* MAXimum Frame reg */ |
Definition at line 1209 of file lpc2xxx_old.h.
#define MAC_MCFG (*(REG32*)(LPC_MAC_BASE + 0x020)) /* MII Mgmt ConFiG reg */ |
Definition at line 1212 of file lpc2xxx_old.h.
#define MAC_MCMD (*(REG32*)(LPC_MAC_BASE + 0x024)) /* MII Mgmt CoMmanD reg */ |
Definition at line 1213 of file lpc2xxx_old.h.
#define MAC_MIND (*(REG32*)(LPC_MAC_BASE + 0x034)) /* MII Mgmt INDicators reg (RO) */ |
Definition at line 1217 of file lpc2xxx_old.h.
#define MAC_MODULEID (*(REG32*)(LPC_MAC_BASE + 0xFFC)) /* Module ID reg (RO) */ |
Definition at line 1256 of file lpc2xxx_old.h.
#define MAC_MRDD (*(REG32*)(LPC_MAC_BASE + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ |
Definition at line 1216 of file lpc2xxx_old.h.
#define MAC_MWTD (*(REG32*)(LPC_MAC_BASE + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ |
Definition at line 1215 of file lpc2xxx_old.h.
#define MAC_POWERDOWN (*(REG32*)(LPC_MAC_BASE + 0xFF4)) /* Power-down reg */ |
Definition at line 1255 of file lpc2xxx_old.h.
#define MAC_RSV (*(REG32*)(LPC_MAC_BASE + 0x160)) /* Rx status vector reg (RO) */ |
Definition at line 1238 of file lpc2xxx_old.h.
#define MAC_RXCONSUMEINDEX (*(REG32*)(LPC_MAC_BASE + 0x118)) /* Rx consume index reg */ |
Definition at line 1229 of file lpc2xxx_old.h.
#define MAC_RXDESCRIPTOR (*(REG32*)(LPC_MAC_BASE + 0x108)) /* Rx descriptor base address reg */ |
Definition at line 1225 of file lpc2xxx_old.h.
#define MAC_RXDESCRIPTORNUM (*(REG32*)(LPC_MAC_BASE + 0x110)) /* Rx number of descriptors reg */ |
Definition at line 1227 of file lpc2xxx_old.h.
#define MAC_RXFILTERCTRL (*(REG32*)(LPC_MAC_BASE + 0x200)) /* Rx filter ctrl reg */ |
Definition at line 1243 of file lpc2xxx_old.h.
#define MAC_RXFILTERWOLCLR (*(REG32*)(LPC_MAC_BASE + 0x208)) /* Rx filter WoL clear reg (WO) */ |
Definition at line 1245 of file lpc2xxx_old.h.
#define MAC_RXFILTERWOLSTS (*(REG32*)(LPC_MAC_BASE + 0x204)) /* Rx filter WoL status reg (RO) */ |
Definition at line 1244 of file lpc2xxx_old.h.
#define MAC_RXPRODUCEINDEX (*(REG32*)(LPC_MAC_BASE + 0x114)) /* Rx produce index reg (RO) */ |
Definition at line 1228 of file lpc2xxx_old.h.
#define MAC_RXSTATUS (*(REG32*)(LPC_MAC_BASE + 0x10C)) /* Rx status base address reg */ |
Definition at line 1226 of file lpc2xxx_old.h.
#define MAC_SA0 (*(REG32*)(LPC_MAC_BASE + 0x040)) /* Station Address 0 reg */ |
Definition at line 1219 of file lpc2xxx_old.h.
#define MAC_SA1 (*(REG32*)(LPC_MAC_BASE + 0x044)) /* Station Address 1 reg */ |
Definition at line 1220 of file lpc2xxx_old.h.
#define MAC_SA2 (*(REG32*)(LPC_MAC_BASE + 0x048)) /* Station Address 2 reg */ |
Definition at line 1221 of file lpc2xxx_old.h.
#define MAC_STATUS (*(REG32*)(LPC_MAC_BASE + 0x104)) /* Status reg (RO) */ |
Definition at line 1224 of file lpc2xxx_old.h.
#define MAC_SUPP (*(REG32*)(LPC_MAC_BASE + 0x018)) /* PHY SUPPort reg */ |
Definition at line 1210 of file lpc2xxx_old.h.
#define MAC_TEST (*(REG32*)(LPC_MAC_BASE + 0x01C)) /* TEST reg */ |
Definition at line 1211 of file lpc2xxx_old.h.
#define MAC_TSV0 (*(REG32*)(LPC_MAC_BASE + 0x158)) /* Tx status vector 0 reg (RO) */ |
Definition at line 1236 of file lpc2xxx_old.h.
#define MAC_TSV1 (*(REG32*)(LPC_MAC_BASE + 0x15C)) /* Tx status vector 1 reg (RO) */ |
Definition at line 1237 of file lpc2xxx_old.h.
#define MAC_TXCONSUMEINDEX (*(REG32*)(LPC_MAC_BASE + 0x12C)) /* Tx consume index reg (RO) */ |
Definition at line 1234 of file lpc2xxx_old.h.
#define MAC_TXDESCRIPTOR (*(REG32*)(LPC_MAC_BASE + 0x11C)) /* Tx descriptor base address reg */ |
Definition at line 1230 of file lpc2xxx_old.h.
#define MAC_TXDESCRIPTORNUM (*(REG32*)(LPC_MAC_BASE + 0x124)) /* Tx number of descriptors reg */ |
Definition at line 1232 of file lpc2xxx_old.h.
#define MAC_TXPRODUCEINDEX (*(REG32*)(LPC_MAC_BASE + 0x128)) /* Tx produce index reg */ |
Definition at line 1233 of file lpc2xxx_old.h.
#define MAC_TXSTATUS (*(REG32*)(LPC_MAC_BASE + 0x120)) /* Tx status base address reg */ |
Definition at line 1231 of file lpc2xxx_old.h.
Definition at line 333 of file lpc2xxx_old.h.
Definition at line 334 of file lpc2xxx_old.h.
#define MAXPACKET_SIZE (*(REG32*)(USB_BASE + 0x4C)) |
Definition at line 1426 of file lpc2xxx_old.h.
#define MCI_ARGUMENT (*(REG32*)(LPC_MCI_BASE + 0x08)) |
Definition at line 1263 of file lpc2xxx_old.h.
#define MCI_CLEAR (*(REG16*)(LPC_MCI_BASE + 0x38)) |
Definition at line 1275 of file lpc2xxx_old.h.
#define MCI_CLOCK (*(REG16*)(LPC_MCI_BASE + 0x04)) |
Definition at line 1262 of file lpc2xxx_old.h.
#define MCI_COMMAND (*(REG16*)(LPC_MCI_BASE + 0x0C)) |
Definition at line 1264 of file lpc2xxx_old.h.
#define MCI_DATA_CNT (*(REG16*)(LPC_MCI_BASE + 0x30)) |
Definition at line 1273 of file lpc2xxx_old.h.
#define MCI_DATA_CTRL (*(REG8*)(LPC_MCI_BASE + 0x2C)) |
Definition at line 1272 of file lpc2xxx_old.h.
#define MCI_DATA_LEN (*(REG16*)(LPC_MCI_BASE + 0x28)) |
Definition at line 1271 of file lpc2xxx_old.h.
#define MCI_DATA_TMR (*(REG32*)(LPC_MCI_BASE + 0x24)) |
Definition at line 1270 of file lpc2xxx_old.h.
#define MCI_FIFO (*(REG8*)(LPC_MCI_BASE + 0x80)) |
Definition at line 1279 of file lpc2xxx_old.h.
#define MCI_FIFO_CNT (*(REG16*)(LPC_MCI_BASE + 0x48)) |
Definition at line 1278 of file lpc2xxx_old.h.
#define MCI_MASK0 (*(REG32*)(LPC_MCI_BASE + 0x3C)) |
Definition at line 1276 of file lpc2xxx_old.h.
#define MCI_MASK1 (*(REG32*)(LPC_MCI_BASE + 0x40)) |
Definition at line 1277 of file lpc2xxx_old.h.
#define MCI_POWER (*(REG8 *)(LPC_MCI_BASE + 0x00)) |
Definition at line 1261 of file lpc2xxx_old.h.
#define MCI_RESP0 (*(REG32*)(LPC_MCI_BASE + 0x14)) |
Definition at line 1266 of file lpc2xxx_old.h.
#define MCI_RESP1 (*(REG32*)(LPC_MCI_BASE + 0x18)) |
Definition at line 1267 of file lpc2xxx_old.h.
#define MCI_RESP2 (*(REG32*)(LPC_MCI_BASE + 0x1C)) |
Definition at line 1268 of file lpc2xxx_old.h.
#define MCI_RESP3 (*(REG32*)(LPC_MCI_BASE + 0x20)) |
Definition at line 1269 of file lpc2xxx_old.h.
#define MCI_RESP_CMD (*(REG8*)(LPC_MCI_BASE + 0x10)) |
Definition at line 1265 of file lpc2xxx_old.h.
#define MCI_STATUS (*(REG32*)(LPC_MCI_BASE + 0x34)) |
Definition at line 1274 of file lpc2xxx_old.h.
#define MCR_Off 0x14 |
Definition at line 385 of file lpc2xxx_old.h.
Definition at line 335 of file lpc2xxx_old.h.
#define MR0_Off 0x18 |
Definition at line 386 of file lpc2xxx_old.h.
#define MR1_Off 0x1C |
Definition at line 387 of file lpc2xxx_old.h.
#define MR2_Off 0x20 |
Definition at line 388 of file lpc2xxx_old.h.
#define MR3_Off 0x24 |
Definition at line 389 of file lpc2xxx_old.h.
#define NDD_REQ_INT_CLR (*(REG32*)(USB_BASE + 0xB0)) |
Definition at line 1455 of file lpc2xxx_old.h.
#define NDD_REQ_INT_SET (*(REG32*)(USB_BASE + 0xB4)) |
Definition at line 1456 of file lpc2xxx_old.h.
#define NDD_REQ_INT_STAT (*(REG32*)(USB_BASE + 0xAC)) |
Definition at line 1454 of file lpc2xxx_old.h.
#define OTG_CLK_CTRL (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x04)) |
Definition at line 1504 of file lpc2xxx_old.h.
#define OTG_CLK_STAT (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x08)) |
Definition at line 1505 of file lpc2xxx_old.h.
#define OTG_I2C_CLKHI (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x0C)) |
Definition at line 1499 of file lpc2xxx_old.h.
#define OTG_I2C_CLKLO (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x10)) |
Definition at line 1500 of file lpc2xxx_old.h.
#define OTG_I2C_CTL (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x08)) |
Definition at line 1498 of file lpc2xxx_old.h.
#define OTG_I2C_RX (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x00)) |
Definition at line 1495 of file lpc2xxx_old.h.
#define OTG_I2C_STS (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x04)) |
Definition at line 1497 of file lpc2xxx_old.h.
#define OTG_I2C_TX (*(REG32*)(LPC_USBOTG_I2C_BASE + 0x00)) |
Definition at line 1496 of file lpc2xxx_old.h.
#define OTG_INT_CLR (*(REG32*)(LPC_USBOTG_BASE + 0x0C)) |
Definition at line 1490 of file lpc2xxx_old.h.
#define OTG_INT_EN (*(REG32*)(LPC_USBOTG_BASE + 0x04)) |
Definition at line 1488 of file lpc2xxx_old.h.
#define OTG_INT_SET (*(REG32*)(LPC_USBOTG_BASE + 0x08)) |
Definition at line 1489 of file lpc2xxx_old.h.
#define OTG_INT_STAT (*(REG32*)(LPC_USBOTG_BASE + 0x00)) |
Definition at line 1487 of file lpc2xxx_old.h.
#define OTG_STAT_CTRL (*(REG32*)(LPC_USBOTG_BASE + 0x10)) |
Definition at line 1492 of file lpc2xxx_old.h.
#define OTG_TIMER (*(REG32*)(LPC_USBOTG_BASE + 0x14)) |
Definition at line 1493 of file lpc2xxx_old.h.
#define PARTCFG (*(REG32*)(PARTCFG_BASE + 0x00)) |
Definition at line 637 of file lpc2xxx_old.h.
#define PC_Off 0x10 |
Definition at line 384 of file lpc2xxx_old.h.
Definition at line 357 of file lpc2xxx_old.h.
Definition at line 358 of file lpc2xxx_old.h.
Definition at line 344 of file lpc2xxx_old.h.
Definition at line 345 of file lpc2xxx_old.h.
#define PIN_INPUT 0 |
FIO DIR CONSTANT TO MAKE PORT BE INPUT.
Definition at line 650 of file lpc2xxx_old.h.
#define PIN_OUTPUT 1 |
FIO DIR CONSTANT TO MAKE PORT BE OUTPUT.
Definition at line 652 of file lpc2xxx_old.h.
#define PINMODE0 PINMODE_n(0) |
Definition at line 588 of file lpc2xxx_old.h.
#define PINMODE1 PINMODE_n(1) |
Definition at line 589 of file lpc2xxx_old.h.
#define PINMODE10 PINMODE_n(10) |
Definition at line 598 of file lpc2xxx_old.h.
#define PINMODE2 PINMODE_n(2) |
Definition at line 590 of file lpc2xxx_old.h.
#define PINMODE3 PINMODE_n(3) |
Definition at line 591 of file lpc2xxx_old.h.
#define PINMODE4 PINMODE_n(4) |
Definition at line 592 of file lpc2xxx_old.h.
#define PINMODE5 PINMODE_n(5) |
Definition at line 593 of file lpc2xxx_old.h.
#define PINMODE6 PINMODE_n(6) |
Definition at line 594 of file lpc2xxx_old.h.
#define PINMODE7 PINMODE_n(7) |
Definition at line 595 of file lpc2xxx_old.h.
#define PINMODE8 PINMODE_n(8) |
Definition at line 596 of file lpc2xxx_old.h.
#define PINMODE9 PINMODE_n(9) |
Definition at line 597 of file lpc2xxx_old.h.
#define PINMODE_DEFAULT PINMODE_PULL_UP |
Definition at line 601 of file lpc2xxx_old.h.
#define PINMODE_n | ( | n | ) | (*(REG32*)(LPC_PINSEL_BASE + 0x40 + (n<<2))) |
Definition at line 587 of file lpc2xxx_old.h.
#define PINMODE_NO_PULL_ 2 |
Definition at line 602 of file lpc2xxx_old.h.
#define PINMODE_PULL_DOWN 3 |
Definition at line 603 of file lpc2xxx_old.h.
#define PINMODE_PULL_UP 0 |
Definition at line 600 of file lpc2xxx_old.h.
#define PINSEL0 PINSEL_n(0) |
Definition at line 575 of file lpc2xxx_old.h.
#define PINSEL1 PINSEL_n(1) |
Definition at line 576 of file lpc2xxx_old.h.
#define PINSEL10 PINSEL_n(10) |
Definition at line 585 of file lpc2xxx_old.h.
#define PINSEL2 PINSEL_n(2) |
Definition at line 577 of file lpc2xxx_old.h.
#define PINSEL3 PINSEL_n(3) |
Definition at line 578 of file lpc2xxx_old.h.
#define PINSEL4 PINSEL_n(4) |
Definition at line 579 of file lpc2xxx_old.h.
#define PINSEL5 PINSEL_n(5) |
Definition at line 580 of file lpc2xxx_old.h.
#define PINSEL6 PINSEL_n(6) |
Definition at line 581 of file lpc2xxx_old.h.
#define PINSEL7 PINSEL_n(7) |
Definition at line 582 of file lpc2xxx_old.h.
#define PINSEL8 PINSEL_n(8) |
Definition at line 583 of file lpc2xxx_old.h.
#define PINSEL9 PINSEL_n(9) |
Definition at line 584 of file lpc2xxx_old.h.
#define PINSEL_n | ( | n | ) | (*(REG32*)(LPC_PINSEL_BASE + (n<<2))) |
get PINSEL REG
Definition at line 532 of file lpc2xxx_old.h.
Definition at line 339 of file lpc2xxx_old.h.
Definition at line 338 of file lpc2xxx_old.h.
Definition at line 341 of file lpc2xxx_old.h.
Definition at line 340 of file lpc2xxx_old.h.
#define PORT_CLEAR_PIN | ( | number | ) | FIOREG_BASE_ADDR_n(((number)>>5),0x1C) = 1 << ((number)&0x1F) |
SET PIN TO LOW LEVEL (IF DIRECTION IS PIN_OUTPUT )
Definition at line 664 of file lpc2xxx_old.h.
#define PORT_DIRECTION_PIN | ( | number, | |
direction | |||
) |
SET PIN DIRECTION (PIN_OUTPUT or PIN_INPUT )
Definition at line 654 of file lpc2xxx_old.h.
#define PORT_GET_PIN | ( | number | ) | (FIOREG_BASE_ADDR_n(((number)>>5),0x14) &(1 << ((number)&0x1F))) |
GET VALUE OF PIN.
Definition at line 667 of file lpc2xxx_old.h.
Definition at line 350 of file lpc2xxx_old.h.
TURN ON PERIPHIRAL MODULE in NXP controller.
Definition at line 349 of file lpc2xxx_old.h.
#define PORT_PIN_MODE_GPIO 0 |
By default 0 configures GP IO.
Definition at line 573 of file lpc2xxx_old.h.
#define PORT_PIN_NUMBER | ( | prt, | |
number | |||
) | (prt*32+number) |
Calculate common pin number accoding to number of port and pin.
Definition at line 551 of file lpc2xxx_old.h.
#define PORT_SELECT_PIN | ( | number, | |
value | |||
) |
Set pin accoding to pin number (number) and its mode (value)
P0[0] has number0, P1[0] has number 32, P2[2] has number 2*32+2=64 and so on
Definition at line 569 of file lpc2xxx_old.h.
#define PORT_SET_PIN | ( | number | ) | FIOREG_BASE_ADDR_n(((number)>>5),0x18) = 1 << ((number)&0x1F) |
SET PIN TO HIGHT LEVEL (IF DIRECTION IS PIN_OUTPUT )
Definition at line 661 of file lpc2xxx_old.h.
#define PR_Off 0x0C |
Definition at line 383 of file lpc2xxx_old.h.
#define PWM0CCR (*(REG32 *)(LPC_PWM0_BASE + 0x28)) |
Definition at line 495 of file lpc2xxx_old.h.
#define PWM0CR0 (*(REG32 *)(LPC_PWM0_BASE + 0x2C)) |
Definition at line 496 of file lpc2xxx_old.h.
#define PWM0CR1 (*(REG32 *)(LPC_PWM0_BASE + 0x30)) |
Definition at line 497 of file lpc2xxx_old.h.
#define PWM0CR2 (*(REG32 *)(LPC_PWM0_BASE + 0x34)) |
Definition at line 498 of file lpc2xxx_old.h.
#define PWM0CR3 (*(REG32 *)(LPC_PWM0_BASE + 0x38)) |
Definition at line 499 of file lpc2xxx_old.h.
#define PWM0CTCR (*(REG32 *)(LPC_PWM0_BASE + 0x70)) |
Definition at line 506 of file lpc2xxx_old.h.
#define PWM0EMR (*(REG32 *)(LPC_PWM0_BASE + 0x3C)) |
Definition at line 500 of file lpc2xxx_old.h.
#define PWM0IR (*(REG32 *)(LPC_PWM0_BASE + 0x00)) |
Definition at line 485 of file lpc2xxx_old.h.
#define PWM0LER (*(REG32 *)(LPC_PWM0_BASE + 0x50)) |
Definition at line 505 of file lpc2xxx_old.h.
#define PWM0MCR (*(REG32 *)(LPC_PWM0_BASE + 0x14)) |
Definition at line 490 of file lpc2xxx_old.h.
#define PWM0MR0 (*(REG32 *)(LPC_PWM0_BASE + 0x18)) |
Definition at line 491 of file lpc2xxx_old.h.
#define PWM0MR1 (*(REG32 *)(LPC_PWM0_BASE + 0x1C)) |
Definition at line 492 of file lpc2xxx_old.h.
#define PWM0MR2 (*(REG32 *)(LPC_PWM0_BASE + 0x20)) |
Definition at line 493 of file lpc2xxx_old.h.
#define PWM0MR3 (*(REG32 *)(LPC_PWM0_BASE + 0x24)) |
Definition at line 494 of file lpc2xxx_old.h.
#define PWM0MR4 (*(REG32 *)(LPC_PWM0_BASE + 0x40)) |
Definition at line 501 of file lpc2xxx_old.h.
#define PWM0MR5 (*(REG32 *)(LPC_PWM0_BASE + 0x44)) |
Definition at line 502 of file lpc2xxx_old.h.
#define PWM0MR6 (*(REG32 *)(LPC_PWM0_BASE + 0x48)) |
Definition at line 503 of file lpc2xxx_old.h.
#define PWM0PC (*(REG32 *)(LPC_PWM0_BASE + 0x10)) |
Definition at line 489 of file lpc2xxx_old.h.
#define PWM0PCR (*(REG32 *)(LPC_PWM0_BASE + 0x4C)) |
Definition at line 504 of file lpc2xxx_old.h.
#define PWM0PR (*(REG32 *)(LPC_PWM0_BASE + 0x0C)) |
Definition at line 488 of file lpc2xxx_old.h.
#define PWM0TC (*(REG32 *)(LPC_PWM0_BASE + 0x08)) |
Definition at line 487 of file lpc2xxx_old.h.
#define PWM0TCR (*(REG32 *)(LPC_PWM0_BASE + 0x04)) |
Definition at line 486 of file lpc2xxx_old.h.
#define PWM1CCR (*(REG32 *)(LPC_PWM1_BASE + 0x28)) |
Definition at line 518 of file lpc2xxx_old.h.
#define PWM1CR0 (*(REG32 *)(LPC_PWM1_BASE + 0x2C)) |
Definition at line 519 of file lpc2xxx_old.h.
#define PWM1CR1 (*(REG32 *)(LPC_PWM1_BASE + 0x30)) |
Definition at line 520 of file lpc2xxx_old.h.
#define PWM1CR2 (*(REG32 *)(LPC_PWM1_BASE + 0x34)) |
Definition at line 521 of file lpc2xxx_old.h.
#define PWM1CR3 (*(REG32 *)(LPC_PWM1_BASE + 0x38)) |
Definition at line 522 of file lpc2xxx_old.h.
#define PWM1CTCR (*(REG32 *)(LPC_PWM1_BASE + 0x70)) |
Definition at line 529 of file lpc2xxx_old.h.
#define PWM1EMR (*(REG32 *)(LPC_PWM1_BASE + 0x3C)) |
Definition at line 523 of file lpc2xxx_old.h.
#define PWM1IR (*(REG32 *)(LPC_PWM1_BASE + 0x00)) |
Definition at line 508 of file lpc2xxx_old.h.
#define PWM1LER (*(REG32 *)(LPC_PWM1_BASE + 0x50)) |
Definition at line 528 of file lpc2xxx_old.h.
#define PWM1MCR (*(REG32 *)(LPC_PWM1_BASE + 0x14)) |
Definition at line 513 of file lpc2xxx_old.h.
#define PWM1MR0 (*(REG32 *)(LPC_PWM1_BASE + 0x18)) |
Definition at line 514 of file lpc2xxx_old.h.
#define PWM1MR1 (*(REG32 *)(LPC_PWM1_BASE + 0x1C)) |
Definition at line 515 of file lpc2xxx_old.h.
#define PWM1MR2 (*(REG32 *)(LPC_PWM1_BASE + 0x20)) |
Definition at line 516 of file lpc2xxx_old.h.
#define PWM1MR3 (*(REG32 *)(LPC_PWM1_BASE + 0x24)) |
Definition at line 517 of file lpc2xxx_old.h.
#define PWM1MR4 (*(REG32 *)(LPC_PWM1_BASE + 0x40)) |
Definition at line 524 of file lpc2xxx_old.h.
#define PWM1MR5 (*(REG32 *)(LPC_PWM1_BASE + 0x44)) |
Definition at line 525 of file lpc2xxx_old.h.
#define PWM1MR6 (*(REG32 *)(LPC_PWM1_BASE + 0x48)) |
Definition at line 526 of file lpc2xxx_old.h.
#define PWM1PC (*(REG32 *)(LPC_PWM1_BASE + 0x10)) |
Definition at line 512 of file lpc2xxx_old.h.
#define PWM1PCR (*(REG32 *)(LPC_PWM1_BASE + 0x4C)) |
Definition at line 527 of file lpc2xxx_old.h.
#define PWM1PR (*(REG32 *)(LPC_PWM1_BASE + 0x0C)) |
Definition at line 511 of file lpc2xxx_old.h.
#define PWM1TC (*(REG32 *)(LPC_PWM1_BASE + 0x08)) |
Definition at line 510 of file lpc2xxx_old.h.
#define PWM1TCR (*(REG32 *)(LPC_PWM1_BASE + 0x04)) |
Definition at line 509 of file lpc2xxx_old.h.
#define REALIZE_EP (*(REG32*)(USB_BASE + 0x44)) |
Definition at line 1424 of file lpc2xxx_old.h.
Definition at line 367 of file lpc2xxx_old.h.
#define RTC_ALDOM (*(REG32*)(LPC_RTC_BASE + 0x6C)) |
Definition at line 1171 of file lpc2xxx_old.h.
#define RTC_ALDOW (*(REG32*)(LPC_RTC_BASE + 0x70)) |
Definition at line 1172 of file lpc2xxx_old.h.
#define RTC_ALDOY (*(REG32*)(LPC_RTC_BASE + 0x74)) |
Definition at line 1173 of file lpc2xxx_old.h.
#define RTC_ALHOUR (*(REG32*)(LPC_RTC_BASE + 0x68)) |
Definition at line 1170 of file lpc2xxx_old.h.
#define RTC_ALMIN (*(REG32*)(LPC_RTC_BASE + 0x64)) |
Definition at line 1169 of file lpc2xxx_old.h.
#define RTC_ALMON (*(REG32*)(LPC_RTC_BASE + 0x78)) |
Definition at line 1174 of file lpc2xxx_old.h.
#define RTC_ALSEC (*(REG32*)(LPC_RTC_BASE + 0x60)) |
Definition at line 1168 of file lpc2xxx_old.h.
#define RTC_ALYEAR (*(REG32*)(LPC_RTC_BASE + 0x7C)) |
Definition at line 1175 of file lpc2xxx_old.h.
#define RTC_AMR (*(REG32*)(LPC_RTC_BASE + 0x10)) |
Definition at line 1151 of file lpc2xxx_old.h.
#define RTC_CCR (*(REG32*)(LPC_RTC_BASE + 0x08)) |
Definition at line 1149 of file lpc2xxx_old.h.
#define RTC_CIIR (*(REG32*)(LPC_RTC_BASE + 0x0C)) |
Definition at line 1150 of file lpc2xxx_old.h.
#define RTC_CISS (*(REG32*)(LPC_RTC_BASE + 0x40)) |
Definition at line 1165 of file lpc2xxx_old.h.
#define RTC_CTC (*(REG32*)(LPC_RTC_BASE + 0x04)) |
Definition at line 1148 of file lpc2xxx_old.h.
#define RTC_CTIME0 (*(REG32*)(LPC_RTC_BASE + 0x14)) |
Definition at line 1152 of file lpc2xxx_old.h.
#define RTC_CTIME1 (*(REG32*)(LPC_RTC_BASE + 0x18)) |
Definition at line 1153 of file lpc2xxx_old.h.
#define RTC_CTIME2 (*(REG32*)(LPC_RTC_BASE + 0x1C)) |
Definition at line 1154 of file lpc2xxx_old.h.
#define RTC_DOM (*(REG32*)(LPC_RTC_BASE + 0x2C)) |
Definition at line 1160 of file lpc2xxx_old.h.
#define RTC_DOW (*(REG32*)(LPC_RTC_BASE + 0x30)) |
Definition at line 1161 of file lpc2xxx_old.h.
#define RTC_DOY (*(REG32*)(LPC_RTC_BASE + 0x34)) |
Definition at line 1162 of file lpc2xxx_old.h.
#define RTC_HOUR (*(REG32*)(LPC_RTC_BASE + 0x28)) |
Definition at line 1159 of file lpc2xxx_old.h.
#define RTC_ILR (*(REG32*)(LPC_RTC_BASE + 0x00)) |
Definition at line 1147 of file lpc2xxx_old.h.
#define RTC_MIN (*(REG32*)(LPC_RTC_BASE + 0x24)) |
Definition at line 1158 of file lpc2xxx_old.h.
#define RTC_MONTH (*(REG32*)(LPC_RTC_BASE + 0x38)) |
Definition at line 1163 of file lpc2xxx_old.h.
#define RTC_PREFRAC (*(REG32*)(LPC_RTC_BASE + 0x84)) |
Definition at line 1178 of file lpc2xxx_old.h.
#define RTC_PREINT (*(REG32*)(LPC_RTC_BASE + 0x80)) |
Definition at line 1177 of file lpc2xxx_old.h.
#define RTC_SEC (*(REG32*)(LPC_RTC_BASE + 0x20)) |
Definition at line 1157 of file lpc2xxx_old.h.
#define RTC_YEAR (*(REG32*)(LPC_RTC_BASE + 0x3C)) |
Definition at line 1164 of file lpc2xxx_old.h.
#define RX_DATA (*(REG32*)(USB_BASE + 0x18)) |
Definition at line 1435 of file lpc2xxx_old.h.
#define RX_PLENGTH (*(REG32*)(USB_BASE + 0x20)) |
Definition at line 1437 of file lpc2xxx_old.h.
#define S0SPCCR (*(REG32*)(LPC_SPI0_BASE + 0x0C)) |
Definition at line 1100 of file lpc2xxx_old.h.
#define S0SPCR (*(REG32*)(LPC_SPI0_BASE + 0x00)) |
Definition at line 1097 of file lpc2xxx_old.h.
#define S0SPDR (*(REG32*)(LPC_SPI0_BASE + 0x08)) |
Definition at line 1099 of file lpc2xxx_old.h.
#define S0SPINT (*(REG32*)(LPC_SPI0_BASE + 0x1C)) |
Definition at line 1103 of file lpc2xxx_old.h.
#define S0SPSR (*(REG32*)(LPC_SPI0_BASE + 0x04)) |
Definition at line 1098 of file lpc2xxx_old.h.
#define S0SPTCR (*(REG32*)(LPC_SPI0_BASE + 0x10)) |
Definition at line 1101 of file lpc2xxx_old.h.
#define S0SPTSR (*(REG32*)(LPC_SPI0_BASE + 0x14)) |
Definition at line 1102 of file lpc2xxx_old.h.
#define SCB_BASE 0xE01FC000 |
Definition at line 330 of file lpc2xxx_old.h.
Definition at line 377 of file lpc2xxx_old.h.
#define SSP0CPSR (*(REG32*)(LPC_SSP0_BASE + 0x10)) |
Definition at line 1109 of file lpc2xxx_old.h.
#define SSP0CR0 (*(REG32*)(LPC_SSP0_BASE + 0x00)) |
Definition at line 1105 of file lpc2xxx_old.h.
#define SSP0CR1 (*(REG32*)(LPC_SSP0_BASE + 0x04)) |
Definition at line 1106 of file lpc2xxx_old.h.
#define SSP0DMACR (*(REG32*)(LPC_SSP0_BASE + 0x24)) |
Definition at line 1114 of file lpc2xxx_old.h.
#define SSP0DR (*(REG32*)(LPC_SSP0_BASE + 0x08)) |
Definition at line 1107 of file lpc2xxx_old.h.
#define SSP0ICR (*(REG32*)(LPC_SSP0_BASE + 0x20)) |
Definition at line 1113 of file lpc2xxx_old.h.
#define SSP0IMSC (*(REG32*)(LPC_SSP0_BASE + 0x14)) |
Definition at line 1110 of file lpc2xxx_old.h.
#define SSP0MIS (*(REG32*)(LPC_SSP0_BASE + 0x1C)) |
Definition at line 1112 of file lpc2xxx_old.h.
#define SSP0RIS (*(REG32*)(LPC_SSP0_BASE + 0x18)) |
Definition at line 1111 of file lpc2xxx_old.h.
#define SSP0SR (*(REG32*)(LPC_SSP0_BASE + 0x0C)) |
Definition at line 1108 of file lpc2xxx_old.h.
#define SYS_ERR_INT_CLR (*(REG32*)(USB_BASE + 0xBC)) |
Definition at line 1458 of file lpc2xxx_old.h.
#define SYS_ERR_INT_SET (*(REG32*)(USB_BASE + 0xC0)) |
Definition at line 1459 of file lpc2xxx_old.h.
#define SYS_ERR_INT_STAT (*(REG32*)(USB_BASE + 0xB8)) |
Definition at line 1457 of file lpc2xxx_old.h.
#define T0CCR VBP_REG32(T0,CCR) |
Definition at line 421 of file lpc2xxx_old.h.
#define T0CR0 VBP_REG32(T0,CR0) |
Definition at line 422 of file lpc2xxx_old.h.
#define T0CR1 VBP_REG32(T0,CR1) |
Definition at line 423 of file lpc2xxx_old.h.
#define T0CR2 VBP_REG32(T0,CR2) |
Definition at line 424 of file lpc2xxx_old.h.
#define T0CR3 VBP_REG32(T0,CR3) |
Definition at line 425 of file lpc2xxx_old.h.
#define T0CTCR VBP_REG32(T0,CTCR) |
Definition at line 427 of file lpc2xxx_old.h.
#define T0EMR VBP_REG32(T0,EMR) |
Definition at line 426 of file lpc2xxx_old.h.
#define T0IR VBP_REG32(T0,IR) |
Definition at line 411 of file lpc2xxx_old.h.
#define T0MCR VBP_REG32(T0,MCR) |
Definition at line 416 of file lpc2xxx_old.h.
#define T0MR0 VBP_REG32(T0,MR0) |
Definition at line 417 of file lpc2xxx_old.h.
#define T0MR1 VBP_REG32(T0,MR1) |
Definition at line 418 of file lpc2xxx_old.h.
#define T0MR2 VBP_REG32(T0,MR2) |
Definition at line 419 of file lpc2xxx_old.h.
#define T0MR3 VBP_REG32(T0,MR3) |
Definition at line 420 of file lpc2xxx_old.h.
Definition at line 415 of file lpc2xxx_old.h.
#define T0PR VBP_REG32(T0,PR) |
Definition at line 414 of file lpc2xxx_old.h.
#define T0TC VBP_REG32(T0,TC) |
Definition at line 413 of file lpc2xxx_old.h.
#define T0TCR VBP_REG32(T0,TCR) |
Definition at line 412 of file lpc2xxx_old.h.
#define T1CCR VBP_REG32(T1,CCR) |
Definition at line 439 of file lpc2xxx_old.h.
#define T1CR0 VBP_REG32(T1,CR0) |
Definition at line 440 of file lpc2xxx_old.h.
#define T1CR1 VBP_REG32(T1,CR1) |
Definition at line 441 of file lpc2xxx_old.h.
#define T1CR2 VBP_REG32(T1,CR2) |
Definition at line 442 of file lpc2xxx_old.h.
#define T1CR3 VBP_REG32(T1,CR3) |
Definition at line 443 of file lpc2xxx_old.h.
#define T1CTCR VBP_REG32(T1,CTCR) |
Definition at line 445 of file lpc2xxx_old.h.
#define T1EMR VBP_REG32(T1,EMR) |
Definition at line 444 of file lpc2xxx_old.h.
#define T1IR VBP_REG32(T1,IR) |
Definition at line 429 of file lpc2xxx_old.h.
#define T1MCR VBP_REG32(T1,MCR) |
Definition at line 434 of file lpc2xxx_old.h.
#define T1MR0 VBP_REG32(T1,MR0) |
Definition at line 435 of file lpc2xxx_old.h.
#define T1MR1 VBP_REG32(T1,MR1) |
Definition at line 436 of file lpc2xxx_old.h.
#define T1MR2 VBP_REG32(T1,MR2) |
Definition at line 437 of file lpc2xxx_old.h.
#define T1MR3 VBP_REG32(T1,MR3) |
Definition at line 438 of file lpc2xxx_old.h.
Definition at line 433 of file lpc2xxx_old.h.
#define T1PR VBP_REG32(T1,PR) |
Definition at line 432 of file lpc2xxx_old.h.
#define T1TC VBP_REG32(T1,TC) |
Definition at line 431 of file lpc2xxx_old.h.
#define T1TCR VBP_REG32(T1,TCR) |
Definition at line 430 of file lpc2xxx_old.h.
#define T2CCR VBP_REG32(T2,CCR) |
Definition at line 457 of file lpc2xxx_old.h.
#define T2CR0 VBP_REG32(T2,CR0) |
Definition at line 458 of file lpc2xxx_old.h.
#define T2CR1 VBP_REG32(T2,CR1) |
Definition at line 459 of file lpc2xxx_old.h.
#define T2CR2 VBP_REG32(T2,CR2) |
Definition at line 460 of file lpc2xxx_old.h.
#define T2CR3 VBP_REG32(T2,CR3) |
Definition at line 461 of file lpc2xxx_old.h.
#define T2CTCR VBP_REG32(T2,CTCR) |
Definition at line 463 of file lpc2xxx_old.h.
#define T2EMR VBP_REG32(T2,EMR) |
Definition at line 462 of file lpc2xxx_old.h.
#define T2IR VBP_REG32(T2,IR) |
Definition at line 447 of file lpc2xxx_old.h.
#define T2MCR VBP_REG32(T2,MCR) |
Definition at line 452 of file lpc2xxx_old.h.
#define T2MR0 VBP_REG32(T2,MR0) |
Definition at line 453 of file lpc2xxx_old.h.
#define T2MR1 VBP_REG32(T2,MR1) |
Definition at line 454 of file lpc2xxx_old.h.
#define T2MR2 VBP_REG32(T2,MR2) |
Definition at line 455 of file lpc2xxx_old.h.
#define T2MR3 VBP_REG32(T2,MR3) |
Definition at line 456 of file lpc2xxx_old.h.
Definition at line 451 of file lpc2xxx_old.h.
#define T2PR VBP_REG32(T2,PR) |
Definition at line 450 of file lpc2xxx_old.h.
#define T2TC VBP_REG32(T2,TC) |
Definition at line 449 of file lpc2xxx_old.h.
#define T2TCR VBP_REG32(T2,TCR) |
Definition at line 448 of file lpc2xxx_old.h.
#define T3CCR VBP_REG32(T3,CCR) |
Definition at line 475 of file lpc2xxx_old.h.
#define T3CR0 VBP_REG32(T3,CR0) |
Definition at line 476 of file lpc2xxx_old.h.
#define T3CR1 VBP_REG32(T3,CR1) |
Definition at line 477 of file lpc2xxx_old.h.
#define T3CR2 VBP_REG32(T3,CR2) |
Definition at line 478 of file lpc2xxx_old.h.
#define T3CR3 VBP_REG32(T3,CR3) |
Definition at line 479 of file lpc2xxx_old.h.
#define T3CTCR VBP_REG32(T3,CTCR) |
Definition at line 481 of file lpc2xxx_old.h.
#define T3EMR VBP_REG32(T3,EMR) |
Definition at line 480 of file lpc2xxx_old.h.
#define T3IR VBP_REG32(T3,IR) |
Definition at line 465 of file lpc2xxx_old.h.
#define T3MCR VBP_REG32(T3,MCR) |
Definition at line 470 of file lpc2xxx_old.h.
#define T3MR0 VBP_REG32(T3,MR0) |
Definition at line 471 of file lpc2xxx_old.h.
#define T3MR1 VBP_REG32(T3,MR1) |
Definition at line 472 of file lpc2xxx_old.h.
#define T3MR2 VBP_REG32(T3,MR2) |
Definition at line 473 of file lpc2xxx_old.h.
#define T3MR3 VBP_REG32(T3,MR3) |
Definition at line 474 of file lpc2xxx_old.h.
Definition at line 469 of file lpc2xxx_old.h.
#define T3PR VBP_REG32(T3,PR) |
Definition at line 468 of file lpc2xxx_old.h.
#define T3TC VBP_REG32(T3,TC) |
Definition at line 467 of file lpc2xxx_old.h.
#define T3TCR VBP_REG32(T3,TCR) |
Definition at line 466 of file lpc2xxx_old.h.
#define TC_Off 0x08 |
Definition at line 382 of file lpc2xxx_old.h.
#define TCR_Off 0x04 |
Definition at line 381 of file lpc2xxx_old.h.
#define TX_DATA (*(REG32*)(USB_BASE + 0x1C)) |
Definition at line 1436 of file lpc2xxx_old.h.
#define TX_PLENGTH (*(REG32*)(USB_BASE + 0x24)) |
Definition at line 1438 of file lpc2xxx_old.h.
#define UART_0_RX_PIN_NUMBER (UART_0_TX_PIN_NUMBER+1) |
PINSEL0 Mask for UART0.
Definition at line 903 of file lpc2xxx_old.h.
#define UART_0_RX_PIN_SELECT UART_0_TX_PIN_SELECT |
PINSEL0 Value for UART0.
Definition at line 909 of file lpc2xxx_old.h.
#define UART_0_TX_PIN_NUMBER PORT_PIN_NUMBER(LPC2XXX_PORT0,0) |
PINSEL0 Mask for UART0.
Definition at line 898 of file lpc2xxx_old.h.
#define UART_0_TX_PIN_SELECT 1 |
PINSEL0 Value for UART0.
Definition at line 906 of file lpc2xxx_old.h.
#define UART_1_RX_PIN_NUMBER (UART_1_TX_PIN_NUMBER+1) |
PINSEL0 Mask for UART1.
Definition at line 922 of file lpc2xxx_old.h.
#define UART_1_RX_PIN_SELECT UART_1_TX_PIN_SELECT |
PINSEL0 Value for UART1.
Definition at line 928 of file lpc2xxx_old.h.
#define UART_1_TX_PIN_NUMBER PORT_PIN_NUMBER(LPC2XXX_PORT0,8) |
PINSEL0 Mask for UART1.
Definition at line 916 of file lpc2xxx_old.h.
#define UART_1_TX_PIN_SELECT 1 |
PINSEL0 Value for UART1.
Definition at line 925 of file lpc2xxx_old.h.
#define UDCA_HEAD (*(REG32*)(USB_BASE + 0x80)) |
Definition at line 1445 of file lpc2xxx_old.h.
#define USB_CTRL (*(REG32*)(USB_BASE + 0x28)) |
Definition at line 1439 of file lpc2xxx_old.h.
#define USB_INT_BASE 0xE01FC1C0 |
Definition at line 1401 of file lpc2xxx_old.h.
#define USB_INT_STAT (*(REG32*)(USB_INT_BASE + 0x00)) |
Definition at line 1404 of file lpc2xxx_old.h.
Definition at line 355 of file lpc2xxx_old.h.
#define USBClkCtrl (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x04)) |
Definition at line 1510 of file lpc2xxx_old.h.
#define USBClkSt (*(REG32*)(LPC_USBOTG_CLK_BASE + 0x08)) |
Definition at line 1511 of file lpc2xxx_old.h.
#define USBPortSel (*(REG32*)(LPC_USBOTG_BASE + 0x10)) |
Definition at line 1509 of file lpc2xxx_old.h.
Definition at line 127 of file lpc2xxx_old.h.
#define VIC_ADC 18 |
Definition at line 154 of file lpc2xxx_old.h.
#define VIC_ARM_CORE_ICE_RX 2 |
Definition at line 134 of file lpc2xxx_old.h.
#define VIC_ARM_CORE_ICE_TX 3 |
Definition at line 135 of file lpc2xxx_old.h.
#define VIC_ARM_PROGRAMM_INT 2 |
Definition at line 133 of file lpc2xxx_old.h.
#define VIC_BIT | ( | chan | ) | (1 << (chan)) |
Vector Control Register – Convert Channel Number to Bit Value.
Definition at line 192 of file lpc2xxx_old.h.
#define VIC_CAN1_RX 26 |
Definition at line 177 of file lpc2xxx_old.h.
#define VIC_CAN1_TX 20 |
Definition at line 171 of file lpc2xxx_old.h.
#define VIC_CAN2_RX 27 |
Definition at line 178 of file lpc2xxx_old.h.
#define VIC_CAN2_TX 21 |
Definition at line 172 of file lpc2xxx_old.h.
#define VIC_CAN3_RX 28 |
Definition at line 179 of file lpc2xxx_old.h.
#define VIC_CAN3_TX 22 |
Definition at line 173 of file lpc2xxx_old.h.
#define VIC_CAN4_RX 29 |
Definition at line 180 of file lpc2xxx_old.h.
#define VIC_CAN4_TX 23 |
Definition at line 174 of file lpc2xxx_old.h.
#define VIC_EINT0 14 |
Definition at line 150 of file lpc2xxx_old.h.
#define VIC_EINT1 15 |
Definition at line 151 of file lpc2xxx_old.h.
#define VIC_EINT2 16 |
Definition at line 152 of file lpc2xxx_old.h.
#define VIC_EINT3 17 |
Definition at line 153 of file lpc2xxx_old.h.
#define VIC_ENABLE (1 << 5) |
Vector Control Register – Vector Interrupt Controller Enable.
Definition at line 189 of file lpc2xxx_old.h.
Referenced by SystemVIC_SetISR().
#define VIC_HIGH_PRIORITY 0x04 |
Definition at line 120 of file lpc2xxx_old.h.
#define VIC_HIGHEST_PRIORITY 0x01 |
Definition at line 119 of file lpc2xxx_old.h.
#define VIC_I2C 9 |
Definition at line 142 of file lpc2xxx_old.h.
#define VIC_LOW_PRIORITY 0x0B |
Definition at line 122 of file lpc2xxx_old.h.
#define VIC_LOWEST_PRIORITY 0x0F |
Definition at line 123 of file lpc2xxx_old.h.
#define VIC_MAX_IRQ_NUMBER (VIC_SIZE-1) |
Definition at line 117 of file lpc2xxx_old.h.
#define VIC_MEDIUM_PRIORITY 0x07 |
Definition at line 121 of file lpc2xxx_old.h.
#define VIC_PLL 12 |
Definition at line 148 of file lpc2xxx_old.h.
#define VIC_PWM 8 |
Definition at line 140 of file lpc2xxx_old.h.
#define VIC_PWM0 8 |
Definition at line 141 of file lpc2xxx_old.h.
#define VIC_RESERVE_23 24 |
Definition at line 175 of file lpc2xxx_old.h.
#define VIC_RESERVE_24 25 |
Definition at line 176 of file lpc2xxx_old.h.
#define VIC_RTC 13 |
Definition at line 149 of file lpc2xxx_old.h.
#define VIC_SIZE 16 |
Definition at line 94 of file lpc2xxx_old.h.
#define VIC_SPI 10 |
Definition at line 143 of file lpc2xxx_old.h.
#define VIC_SPI0 10 |
Definition at line 144 of file lpc2xxx_old.h.
#define VIC_SPI1 11 |
Definition at line 146 of file lpc2xxx_old.h.
#define VIC_SSP0 10 |
Definition at line 145 of file lpc2xxx_old.h.
#define VIC_SSP1 11 |
Definition at line 147 of file lpc2xxx_old.h.
#define VIC_TIMER0 4 |
Definition at line 136 of file lpc2xxx_old.h.
#define VIC_TIMER1 5 |
Definition at line 137 of file lpc2xxx_old.h.
#define VIC_UART0 6 |
Definition at line 138 of file lpc2xxx_old.h.
#define VIC_UART1 7 |
Definition at line 139 of file lpc2xxx_old.h.
#define VIC_WDT 0 |
Definition at line 132 of file lpc2xxx_old.h.
Definition at line 195 of file lpc2xxx_old.h.
Definition at line 198 of file lpc2xxx_old.h.
Definition at line 199 of file lpc2xxx_old.h.
Definition at line 197 of file lpc2xxx_old.h.
Definition at line 194 of file lpc2xxx_old.h.
Definition at line 202 of file lpc2xxx_old.h.
Definition at line 196 of file lpc2xxx_old.h.
Definition at line 200 of file lpc2xxx_old.h.
Definition at line 201 of file lpc2xxx_old.h.
Definition at line 203 of file lpc2xxx_old.h.
Definition at line 205 of file lpc2xxx_old.h.
#define VICVectAddr0 VICVectAddr_n(0) |
Definition at line 208 of file lpc2xxx_old.h.
#define VICVectAddr1 VICVectAddr_n(1) |
Definition at line 209 of file lpc2xxx_old.h.
#define VICVectAddr10 VICVectAddr_n(10) |
Definition at line 218 of file lpc2xxx_old.h.
#define VICVectAddr11 VICVectAddr_n(11) |
Definition at line 219 of file lpc2xxx_old.h.
#define VICVectAddr12 VICVectAddr_n(12) |
Definition at line 220 of file lpc2xxx_old.h.
#define VICVectAddr13 VICVectAddr_n(13) |
Definition at line 221 of file lpc2xxx_old.h.
#define VICVectAddr14 VICVectAddr_n(14) |
Definition at line 222 of file lpc2xxx_old.h.
#define VICVectAddr15 VICVectAddr_n(15) |
Definition at line 223 of file lpc2xxx_old.h.
#define VICVectAddr16 VICVectAddr_n(16) |
Definition at line 224 of file lpc2xxx_old.h.
#define VICVectAddr17 VICVectAddr_n(17) |
Definition at line 225 of file lpc2xxx_old.h.
#define VICVectAddr18 VICVectAddr_n(18) |
Definition at line 226 of file lpc2xxx_old.h.
#define VICVectAddr19 VICVectAddr_n(19) |
Definition at line 227 of file lpc2xxx_old.h.
#define VICVectAddr2 VICVectAddr_n(2) |
Definition at line 210 of file lpc2xxx_old.h.
#define VICVectAddr20 VICVectAddr_n(20) |
Definition at line 228 of file lpc2xxx_old.h.
#define VICVectAddr21 VICVectAddr_n(21) |
Definition at line 229 of file lpc2xxx_old.h.
#define VICVectAddr22 VICVectAddr_n(22) |
Definition at line 230 of file lpc2xxx_old.h.
#define VICVectAddr23 VICVectAddr_n(23) |
Definition at line 231 of file lpc2xxx_old.h.
#define VICVectAddr24 VICVectAddr_n(24) |
Definition at line 232 of file lpc2xxx_old.h.
#define VICVectAddr25 VICVectAddr_n(25) |
Definition at line 233 of file lpc2xxx_old.h.
#define VICVectAddr26 VICVectAddr_n(26) |
Definition at line 234 of file lpc2xxx_old.h.
#define VICVectAddr27 VICVectAddr_n(27) |
Definition at line 235 of file lpc2xxx_old.h.
#define VICVectAddr28 VICVectAddr_n(28) |
Definition at line 236 of file lpc2xxx_old.h.
#define VICVectAddr29 VICVectAddr_n(29) |
Definition at line 237 of file lpc2xxx_old.h.
#define VICVectAddr3 VICVectAddr_n(3) |
Definition at line 211 of file lpc2xxx_old.h.
#define VICVectAddr30 VICVectAddr_n(30) |
Definition at line 238 of file lpc2xxx_old.h.
#define VICVectAddr31 VICVectAddr_n(31) |
Definition at line 239 of file lpc2xxx_old.h.
#define VICVectAddr4 VICVectAddr_n(4) |
Definition at line 212 of file lpc2xxx_old.h.
#define VICVectAddr5 VICVectAddr_n(5) |
Definition at line 213 of file lpc2xxx_old.h.
#define VICVectAddr6 VICVectAddr_n(6) |
Definition at line 214 of file lpc2xxx_old.h.
#define VICVectAddr7 VICVectAddr_n(7) |
Definition at line 215 of file lpc2xxx_old.h.
#define VICVectAddr8 VICVectAddr_n(8) |
Definition at line 216 of file lpc2xxx_old.h.
#define VICVectAddr9 VICVectAddr_n(9) |
Definition at line 217 of file lpc2xxx_old.h.
Definition at line 207 of file lpc2xxx_old.h.
#define VICVectCntl0 VICVectCntl_n(0) |
Definition at line 242 of file lpc2xxx_old.h.
#define VICVectCntl1 VICVectCntl_n(1) |
Definition at line 243 of file lpc2xxx_old.h.
#define VICVectCntl10 VICVectCntl_n(10) |
Definition at line 252 of file lpc2xxx_old.h.
#define VICVectCntl11 VICVectCntl_n(11) |
Definition at line 253 of file lpc2xxx_old.h.
#define VICVectCntl12 VICVectCntl_n(12) |
Definition at line 254 of file lpc2xxx_old.h.
#define VICVectCntl13 VICVectCntl_n(13) |
Definition at line 255 of file lpc2xxx_old.h.
#define VICVectCntl14 VICVectCntl_n(14) |
Definition at line 256 of file lpc2xxx_old.h.
#define VICVectCntl15 VICVectCntl_n(15) |
Definition at line 257 of file lpc2xxx_old.h.
#define VICVectCntl16 VICVectCntl_n(16) |
Definition at line 258 of file lpc2xxx_old.h.
#define VICVectCntl17 VICVectCntl_n(17) |
Definition at line 259 of file lpc2xxx_old.h.
#define VICVectCntl18 VICVectCntl_n(18) |
Definition at line 260 of file lpc2xxx_old.h.
#define VICVectCntl19 VICVectCntl_n(19) |
Definition at line 261 of file lpc2xxx_old.h.
#define VICVectCntl2 VICVectCntl_n(2) |
Definition at line 244 of file lpc2xxx_old.h.
#define VICVectCntl20 VICVectCntl_n(20) |
Definition at line 262 of file lpc2xxx_old.h.
#define VICVectCntl21 VICVectCntl_n(21) |
Definition at line 263 of file lpc2xxx_old.h.
#define VICVectCntl22 VICVectCntl_n(22) |
Definition at line 264 of file lpc2xxx_old.h.
#define VICVectCntl23 VICVectCntl_n(23) |
Definition at line 265 of file lpc2xxx_old.h.
#define VICVectCntl24 VICVectCntl_n(24) |
Definition at line 266 of file lpc2xxx_old.h.
#define VICVectCntl25 VICVectCntl_n(25) |
Definition at line 267 of file lpc2xxx_old.h.
#define VICVectCntl26 VICVectCntl_n(26) |
Definition at line 268 of file lpc2xxx_old.h.
#define VICVectCntl27 VICVectCntl_n(27) |
Definition at line 269 of file lpc2xxx_old.h.
#define VICVectCntl28 VICVectCntl_n(28) |
Definition at line 270 of file lpc2xxx_old.h.
#define VICVectCntl29 VICVectCntl_n(29) |
Definition at line 271 of file lpc2xxx_old.h.
#define VICVectCntl3 VICVectCntl_n(3) |
Definition at line 245 of file lpc2xxx_old.h.
#define VICVectCntl30 VICVectCntl_n(30) |
Definition at line 272 of file lpc2xxx_old.h.
#define VICVectCntl31 VICVectCntl_n(31) |
Definition at line 273 of file lpc2xxx_old.h.
#define VICVectCntl4 VICVectCntl_n(4) |
Definition at line 246 of file lpc2xxx_old.h.
#define VICVectCntl5 VICVectCntl_n(5) |
Definition at line 247 of file lpc2xxx_old.h.
#define VICVectCntl6 VICVectCntl_n(6) |
Definition at line 248 of file lpc2xxx_old.h.
#define VICVectCntl7 VICVectCntl_n(7) |
Definition at line 249 of file lpc2xxx_old.h.
#define VICVectCntl8 VICVectCntl_n(8) |
Definition at line 250 of file lpc2xxx_old.h.
#define VICVectCntl9 VICVectCntl_n(9) |
Definition at line 251 of file lpc2xxx_old.h.
Definition at line 241 of file lpc2xxx_old.h.
#define VICVectPriority0 VICVectCntl_n(0) |
Definition at line 275 of file lpc2xxx_old.h.
#define VICVectPriority1 VICVectCntl_n(1) |
Definition at line 276 of file lpc2xxx_old.h.
#define VICVectPriority10 VICVectCntl_n(10) |
Definition at line 285 of file lpc2xxx_old.h.
#define VICVectPriority11 VICVectCntl_n(11) |
Definition at line 286 of file lpc2xxx_old.h.
#define VICVectPriority12 VICVectCntl_n(12) |
Definition at line 287 of file lpc2xxx_old.h.
#define VICVectPriority13 VICVectCntl_n(13) |
Definition at line 288 of file lpc2xxx_old.h.
#define VICVectPriority14 VICVectCntl_n(14) |
Definition at line 289 of file lpc2xxx_old.h.
#define VICVectPriority15 VICVectCntl_n(15) |
Definition at line 290 of file lpc2xxx_old.h.
#define VICVectPriority16 VICVectCntl_n(16) |
Definition at line 291 of file lpc2xxx_old.h.
#define VICVectPriority17 VICVectCntl_n(17) |
Definition at line 292 of file lpc2xxx_old.h.
#define VICVectPriority18 VICVectCntl_n(18) |
Definition at line 293 of file lpc2xxx_old.h.
#define VICVectPriority19 VICVectCntl_n(19) |
Definition at line 294 of file lpc2xxx_old.h.
#define VICVectPriority2 VICVectCntl_n(2) |
Definition at line 277 of file lpc2xxx_old.h.
#define VICVectPriority20 VICVectCntl_n(20) |
Definition at line 295 of file lpc2xxx_old.h.
#define VICVectPriority21 VICVectCntl_n(21) |
Definition at line 296 of file lpc2xxx_old.h.
#define VICVectPriority22 VICVectCntl_n(22) |
Definition at line 297 of file lpc2xxx_old.h.
#define VICVectPriority23 VICVectCntl_n(23) |
Definition at line 298 of file lpc2xxx_old.h.
#define VICVectPriority24 VICVectCntl_n(24) |
Definition at line 299 of file lpc2xxx_old.h.
#define VICVectPriority25 VICVectCntl_n(25) |
Definition at line 300 of file lpc2xxx_old.h.
#define VICVectPriority26 VICVectCntl_n(26) |
Definition at line 301 of file lpc2xxx_old.h.
#define VICVectPriority27 VICVectCntl_n(27) |
Definition at line 302 of file lpc2xxx_old.h.
#define VICVectPriority28 VICVectCntl_n(28) |
Definition at line 303 of file lpc2xxx_old.h.
#define VICVectPriority29 VICVectCntl_n(29) |
Definition at line 304 of file lpc2xxx_old.h.
#define VICVectPriority3 VICVectCntl_n(3) |
Definition at line 278 of file lpc2xxx_old.h.
#define VICVectPriority30 VICVectCntl_n(30) |
Definition at line 305 of file lpc2xxx_old.h.
#define VICVectPriority31 VICVectCntl_n(31) |
Definition at line 306 of file lpc2xxx_old.h.
#define VICVectPriority4 VICVectCntl_n(4) |
Definition at line 279 of file lpc2xxx_old.h.
#define VICVectPriority5 VICVectCntl_n(5) |
Definition at line 280 of file lpc2xxx_old.h.
#define VICVectPriority6 VICVectCntl_n(6) |
Definition at line 281 of file lpc2xxx_old.h.
#define VICVectPriority7 VICVectCntl_n(7) |
Definition at line 282 of file lpc2xxx_old.h.
#define VICVectPriority8 VICVectCntl_n(8) |
Definition at line 283 of file lpc2xxx_old.h.
#define VICVectPriority9 VICVectCntl_n(9) |
Definition at line 284 of file lpc2xxx_old.h.
#define WDCLKSEL (*(REG32*)(LPC_WDG_BASE + 0x10)) |
Definition at line 1201 of file lpc2xxx_old.h.
#define WDFEED (*(REG32*)(LPC_WDG_BASE + 0x08)) |
Definition at line 1199 of file lpc2xxx_old.h.
#define WDMOD (*(REG32*)(LPC_WDG_BASE + 0x0)) |
Definition at line 1197 of file lpc2xxx_old.h.
#define WDTC (*(REG32*)(LPC_WDG_BASE + 0x04)) |
Definition at line 1198 of file lpc2xxx_old.h.
#define WDTV (*(REG32*)(LPC_WDG_BASE + 0x0C)) |
Definition at line 1200 of file lpc2xxx_old.h.