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system_LPC2xxx.c
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1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 /*-----------Документация Doxygen -- Doxygen documentation -----------------*/
33 /** \file
34  *\~russian
35  * system.c Созданный по стандартам CMSIS для МК серии LPC2xxx
36  * обеспечивающий уровень доступа к периферии устройств
37  *
38  *\~
39  * CMSIS like Device Peripheral Access Layer system.c Source File
40  * for the NXP LPC2xxx Device Series
41  * \author Dmitriy Cherepanov
42  * \date 2011
43  * \ingroup LPC2xxx_System
44  */
45 /*----------------------------------------------------------------------------*/
46 #ifdef __GNUC__
47 #if (__GNUC__ != 0)
48  #ifndef MOVE_CODE_TO_FLASH
49  #define MOVE_CODE_TO_FLASH __attribute__ ((section (".text.systeminit")))
50  #endif
51 #endif
52 #endif
54 void SystemVIC_Init(void) MOVE_CODE_TO_FLASH ;
55 /*----------------------------------------------------------------------------*/
56 #if _HASBSPBRD > 0
57 #include "bsp_board_def.h" /* board /definitions if you do not have this file then create it with '#include "mcu_id.h"' line*/
58 #else
59  #include "mcu_id.h"
60 #endif
61 #include "LPC2xxx.h" /* for registers*/ /* #include "LPC2xxx.h" */
62 #include "lpc2xxx_pclk.h"
63 #include "lpc2xxx_pconp.h"
64 /*------ МАКРОСЫ И ОПРЕДЕЛЕНИЯ - MACROSES ------------------------------------*/
65 /* ----- SysTick function ---------------------*/
66 /* \ingroup CMSIS_Core_FunctionInterface
67  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
68  \brief Functions that configure the System.
69  @{
70  */
71 
72 #if (__Vendor_SysTickConfig != 0)
73 /*----------------------------------------------------------------------------*/
74 #if defined (system_LPC_USE_TIMER_0)
75  #define TIMER LPC_TIM0
76  #define VIC_TIMER TIMER0_IRQn
77  #define SysTick_LOAD_RELOAD_Msk 0xffffffff
78 #elif defined (system_LPC_USE_TIMER_2)
79  #define SysTick_LOAD_RELOAD_Msk 0xffffffff
80  #define TIMER LPC_TIM2
81  #define VIC_TIMER TIMER2_IRQn
82 #elif defined (system_LPC_USE_TIMER_3)
83  #define SysTick_LOAD_RELOAD_Msk 0xffffffff
84  #define TIMER LPC_TIM3
85  #define VIC_TIMER TIMER3_IRQn
86 #else
87  #define SysTick_LOAD_RELOAD_Msk 0xffffffff
88  #define TIMER LPC_TIM1
89  #define VIC_TIMER TIMER1_IRQn
90 #endif
91 
92 ISR_EXCEPTION_PROTO(SysTick_internal);
93 /** \brief System Tick Configuration
94 
95  The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
96  Counter is in free running mode to generate periodic interrupts.
97 
98  \param [in] ticks Number of ticks between two interrupts.
99 
100  \return 0 Function succeeded.
101  \return 1 Function failed.
102 
103  \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
104  function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
105  must contain a vendor-specific implementation of this function.
106 
107  */
109 {
110 
111 #if defined (system_LPC_USE_TIMER_1)
113  LPC_SC->PCLKSEL0 = LPC_SC->PCLKSEL0&(~(1<<5))|(1<<4);//PCLK == CPUCLK
114 #elif defined (system_LPC_USE_TIMER_2)
116  LPC_SC->PCLKSEL1 = LPC_SC->PCLKSEL1&(~(1<<13))|(1<<12);//PCLK == CPUCLK
117 #elif defined (system_LPC_USE_TIMER_3)
119  LPC_SC->PCLKSEL1 = LPC_SC->PCLKSEL1&(~(1<<15))|(1<<14);//PCLK == CPUCLK
120 #else
122  LPC_SC->PCLKSEL0 = LPC_SC->PCLKSEL0&(~(1<<3))|(1<<2);//PCLK == CPUCLK
123 #endif
124 
125  if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
126  // setup Timer to count forever
127  //interrupt_reg
128  TIMER->TCR = TCR_RESET_Msk; // reset & disable timer 0
129  TIMER->TC = ticks;
130  TIMER->PR = 0; // set the prescale divider
131  //Reset of TC and Interrupt when MR3 MR2 matches TC
132  TIMER->MCR = TMCR_MR3_R_Msk | TMCR_MR3_I_Msk /*|TMCR_MR2_R_Msk | TMCR_MR2_I_Msk*/;
133  //clock_match_reg2 = 0xFFFFFFFF; // for make zero clock iterrupt
134  TIMER->MR3 = ticks; // match registers
135  TIMER->CCR = 0; // disable compare registers
136  TIMER->EMR = 0; // disable external match register
137  // initialize the interrup t vector
138  SystemVIC_SetISR(&SysTick_internal_Handler,VIC_TIMER,VIC_HIGH_PRIORITY);
139  TIMER->TCR = TCR_ENABLE_Msk; // enable timer 0
140 
141  return (0); /* Function successful */
142 }
143 
144 #endif
145 
146 /*@} end of CMSIS_Core_SysTickFunctions */
147 /*--------- PLL -------------------------------------------------------------*/
148 #if (LPC2xxx_CLOCK_SETUP)
149  #if (LPC2xxx_PLL_SETUP)
150  static void pll_feed(void) MOVE_CODE_TO_FLASH ;
151  #endif /*(LPC2xxx_PLL_SETUP) */
152 #endif /*(LPC2xxx_CLOCK_SETUP)*/
153 /*-----------Peripheral clock selsection -------------------------------------*/
154 #include "lpc2xxx_pllclk.h"
155 #ifndef PCLKSEL0_Val
156  #define PCLKSEL0_Val 0
157 #endif
158 #ifndef PCLKSEL1_Val
159  #define PCLKSEL1_Val 0
160 #endif
161 /*-------- lpc2xxx_mam -------------------------------------------------------*/
162 #define LPC_SC_MAM_MODE_DISABLED 0
163 #define LPC_SC_MAM_MODE_PARTIAL 1
164 #define LPC_SC_MAM_MODE_FULL 2
165 #ifdef F_CCO_HZ
166  #if ((F_CCO_HZ < 60002304) && (F_CCO_HZ > 0))
167  #define MAMTIM_Val ((F_CCO_HZ/20000768) + 1)
168  #endif
169 #endif
170 #ifndef MAMTIM_Val
171  #define MAMTIM_Val 4
172 #endif
173 #ifndef MAMCR_Val
174  #define MAMCR_Val LPC_SC_MAM_MODE_FULL
175 #endif
176 /*----------------------------------------------------------------------------
177  Check the register settings
178  *----------------------------------------------------------------------------*/
179 #define CHECK_RANGE(val, min, max) ((val < min) || (val > max))
180 #define CHECK_RSVD(val, mask) (val & mask)
181 /* ---------------------Clock Configuration ----------------------------------*/
182 #if (CHECK_RSVD((1<<LPC_SC_PLLCFG_OSCEN_Pos), ~0x00000030))
183  #error "SCS: Invalid values of reserved bits!"
184 #endif
185 #if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2))
186  #error "CLKSRCSEL: Value out of range!"
187 #endif
188 #if (CHECK_RANGE((APBDIV_Val), 0, 2))
189  #error "APBDIV: Value out of range!"
190 #endif
191 /*------ ОБЪЯВЛЕНИЯ ЛОКАЛЬНЫХ ФУНКЦИЙ - FILE PRIVATE FUNCTIONS API------------*/
192 
193 /*---------- ГЛОБАЛЬНЫЕ ДАННЫЕ - FILE GLOBAL VARIABLES------------------------*/
194 /* at the start using Internal RC Oscillator */
195 uint32_t SystemCoreClock = F_CCLK_HZ; /*!< System Clock Frequency (Core Clock) */
196 
197 
198 
199 
200 /*------ ГЛОБАЛЬНЫЕ ФУНКЦИИ - PUBLIC FUNCTION IMPLEMENTATION -----------------*/
201 /**
202  * Initialize the system
203  *
204  * \return none
205  *
206  * \brief Setup the microcontroller system.
207  * Initialize the System and update the SystemCoreClock variable.
208  */
209 void SystemInit(void)
210 {
211 #if (LPC2xxx_VIC_SETUP)
212  SystemVIC_Init ();
213 #endif
214 #if (LPC2xxx_CLOCK_SETUP)
215  #if (LPC2xxx_PLL_SETUP) /*Setting the Phased Lock Loop (PLL) lpc2xxx_pllclk_init();*/
216 /*Disconnect the PLL with one feed sequence if PLL is already connected*/
217  if ( LPC_SC->PLLSTAT & (1 << LPC_SC_PLLSTAT_PLLC_Pos) ) {
218  LPC_SC->PLLCON = 1; /* Enable PLL, disconnected */
219  pll_feed();
220  }
221  LPC_SC->PLLCON = 0;/* Disable the PLL with one feed sequence.*/
222  pll_feed();
223  #if (i_MCU_MODEL > 2300) /* Enable main OSC */
224  LPC_SC->SCS |= (1 << LPC_SC_PLLCFG_OSCEN_Pos);
225  /* Wait until main OSC is usable */
226  while( !(LPC_SC->SCS & (1 << LPC_SC_PLLCFG_OSCSTAT_Pos) ));
227  LPC_SC->CLKSRCSEL = CLKSRCSEL_Val;/* select the PLL clock source */
228  #endif
230  |PLL_MValue;
231  pll_feed();
232  LPC_SC->PLLCON = 1;/* Enable the PLL disconnected with one feed sequence*/
233  pll_feed();
234  #if (i_MCU_MODEL > 2300)
235  /* Change the CPU Clock Divider setting for the operation with the PLL.
236  It's critical to do this before connecting the PLL */
237  LPC_SC->CCLKCFG = CCLKCFG_Val;
238  #ifdef USBCLKCFG_Val
239  LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* usbclk must be 48 MHz */
240  #endif
241  #endif
242 /*Wait for the PLL to achieve lock by monitoring the PLOCK bit in the PLLSTAT register*/
243  while ( ((LPC_SC->PLLSTAT & (1 << LPC_SC_PLLSTAT_PLOCK_Pos)) == 0) );/* Check lock bit status */
244  #if (i_MCU_MODEL > 2300)
245  while ( (LPC_SC->PLLSTAT & 0x00FF7FFF) !=
247  #endif
248  LPC_SC->PLLCON = 3;/* enable and Connect the PLL with one feed sequence. */
249  pll_feed();/* Check connect bit status */
250  while ( ((LPC_SC->PLLSTAT & (1 << LPC_SC_PLLSTAT_PLLC_Pos)) == 0) );
251  SystemCoreClock = F_CCLK_HZ;
252  #endif /*(LPC2xxx_PLL_SETUP) */
253 #endif /*(LPC2xxx_CLOCK_SETUP)*/
254 /*---------Peripheral clock selsection -------------lpc2xxx_pclk_init();*/
255 #if (i_MCU_MODEL > 2300)
256  LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */
257  LPC_SC->PCLKSEL1 = PCLKSEL1_Val;
258 #else
259  LPC_SC->APBDIV = APBDIV_Val;
260 #endif
261 
262 #if (LPC2xxx_FLASH_SETUP == 1) /* Flash Accelerator Setup */
263  /* Enabling MAM and setting number of clocks
264  used for Flash memory fetch (4 cclks in this case) */
265  LPC_SC->MAMCR = 0x0;
266  LPC_SC->MAMTIM = MAMTIM_Val;
267  LPC_SC->MAMCR = MAMCR_Val;
268 #endif
269 
270 #if (LPC2xxx_SRAM_SETUP == 1) /* Setup Static Memory*/
271 
272 #endif
273 
274 #if (LPC2xxx_SDRAM_SETUP == 1) /* Flash Accelerator Setup*/
275 
276 #endif
277 #if (BSP_BOARD_HOOK_SETUP == 1) /* Some other setup functions*/
278  BSP_BOARD_HOOK(); /* Some other setup functions*/
279 #endif
280 }
281 /*----------------------------------------------------------------------------*/
282 #if 1/* (LPC2xxx_VIC_SETUP)*/
283 #ifndef NULL
284  #if defined(__cplusplus)
285  #define NULL 0
286  #else
287  #define NULL ((void *)0)
288  #endif
289 #endif
290 /*void *SystemVIC_SetISR( ISR_HANDLER_PROTO(*isr_func), unsigned char IRQ_type, unsigned char priority )
291 
292 */
293 MOVE_CODE_TO_FLASH
294 void *SystemVIC_SetISR(ISR_HANDLER((*isr_func)),IRQn_Type IRQ_type,
295  signed char priority )
296 {
297 unsigned char i;
298 #if (i_MCU_MODEL >= 2300)
299  if ( IRQ_type >= (VIC_MAX_IRQ_NUMBER+1) )
300  return NULL; /* strange IRQ number*/
301  i = IRQ_type;
302  VIC->IntEnClr = 1 << i;
303  if (priority >= 0) VIC->VectCntl[i] = priority & 0xF;
304 #else
305 (void) priority;
306  i = VIC_SIZE;
307  do { /* find free vector slot*/
308  i--;
309  if (IRQ_type >= (VIC_MAX_IRQ_NUMBER + 1)) {/*zero all slots*/
310  VIC->VectCntl[i] = 0;
311  VIC->VectAddr[i] = 0;
312  if (i == 0) /* all slots are initilized zeros*/
313  return NULL;
314  else
315  continue;
316  }
317  if ((VIC->VectCntl[i] & 0x1f) == (unsigned)IRQ_type) {
318  goto good_exit;
319  }
320  if (VIC->VectAddr[i] == (uint32_t)NULL)
321  break; /*slot is free :-)*/
322  } while (i > 0);
323 
324 
325  if (VIC->VectAddr[i] != (uint32_t)NULL)
326  return NULL; /* no free irq slots*/
327 good_exit:
328  if (priority >= 0)
329  VIC->vectCntl[i] = VIC_ENABLE | IRQ_type;
330  else
331  VIC->vectCntl[i] = 0;/*disable vic*/
332 #endif
333  VIC->VectAddr[i] = (uint32_t)isr_func;
334  if (priority >= 0)
335  VIC->IntEnable = 1 << IRQ_type;
336  else
337  VIC->IntEnClr = 1 << IRQ_type;
338 return ((void *)&VIC->VectAddr[i]); /* has yet this interrupt*/
339 }
340 #if (i_MCU_MODEL >= 2300)
341  void SystemVIC_Init()
342  {
343  signed char i;
344  VIC->IntEnClr = 0xFFFFFFFF;/*clear all interrupts*/
345  VIC->IntSelect = 0;
346  VIC->VectAddress = 0;
347 
348  i = (VIC_SIZE-1);
349  for (; i >= 0;i--) { /* find free vector slot*/
350  VIC->VectAddr[i] = (uint32_t)ISR_HANDLES_ARRAY[i];
351  VIC->VectCntl[i] = 0xF;
352  }
353  }
354 
355 #else
356  #ifndef VIC_DEFAULT_ISR
357  #define VIC_DEFAULT_ISR vic_def_isr
358  #endif
360  void SystemVIC_Init(void)
361  { /* Set the default interrupt sub routine */
362  VIC->defVectAddr = (uint32_t)VIC_DEFAULT_ISR;
363  VIC->intEnClr = 0xFFFFFFFF; /*clear all interrupts*/
364  VIC->intSelect = 0;
365  VIC->address = 0;
366  SystemVIC_SetISR (0,VIC_MAX_IRQ_NUMBER+1,0);/* reset all vectors*/
367  }
368 #endif
369 
370 
371 
372 #endif /* LPC2xxx_VIC_SETUP */
373 /*----------------------------------------------------------------------------*/
375 {
376 ISR_ptr_type isr_func;
377  isr_func = GET_ISR_HANDLER_BY_NUMBER(IRQn);
378  if (isr_func != NULL)
379  SystemVIC_SetISR(isr_func,IRQn,VIC->VectCntl[IRQn]);/* enable interrupt */
380 }
381 /*------ ЛОКАЛЬНЫЕ ФУНКЦИИ - PRIVATE FUNCTION IMPLEMENTATION -----------------*/
382 #if (LPC2xxx_CLOCK_SETUP)
383  #if (LPC2xxx_PLL_SETUP)
384  static void pll_feed(void)
385  {
386  LPC_SC->PLLFEED = 0xAA;
387  LPC_SC->PLLFEED = 0x55;
388  };
389  #endif /*(LPC2xxx_PLL_SETUP) */
390 #endif /*(LPC2xxx_CLOCK_SETUP)*/
391 /*----------------------------------------------------------------------------*/
392 #define def_IRQHandler_name(handler_name) handler_name##_IRQHandler
393 extern ISR_IRQ_PROTO(WDT);
394 extern ISR_IRQ_PROTO(PROGRAMM_INT);
395 extern ISR_IRQ_PROTO(ARM_CORE_ICE_RX);
396 extern ISR_IRQ_PROTO(ARM_CORE_ICE_TX);
397 extern ISR_IRQ_PROTO(TIMER0);
398 extern ISR_IRQ_PROTO(TIMER1);
399 extern ISR_IRQ_PROTO(UART0);
400 extern ISR_IRQ_PROTO(UART1);
401 extern ISR_IRQ_PROTO(PWM);
402 extern ISR_IRQ_PROTO(PWM0);
403 
404 extern ISR_IRQ_PROTO(I2C);
405 extern ISR_IRQ_PROTO(I2C0);
406 
407 extern ISR_IRQ_PROTO(SPI);
408 extern ISR_IRQ_PROTO(SPI0);
409 extern ISR_IRQ_PROTO(SSP0);
410 
411 extern ISR_IRQ_PROTO(SPI1);
412 extern ISR_IRQ_PROTO(SSP1);
413 
414 extern ISR_IRQ_PROTO(PLL0);
415 extern ISR_IRQ_PROTO(RTC);
416 extern ISR_IRQ_PROTO(EINT0);
417 extern ISR_IRQ_PROTO(EINT1);
418 extern ISR_IRQ_PROTO(EINT2);
419 extern ISR_IRQ_PROTO(EINT3);
420 extern ISR_IRQ_PROTO(ADC);
421 #if (i_MCU_MODEL >= 2300)
422 extern ISR_IRQ_PROTO(I2C1);
423 extern ISR_IRQ_PROTO(BOD);
424 extern ISR_IRQ_PROTO(ENET);
425 extern ISR_IRQ_PROTO(USB);
426 extern ISR_IRQ_PROTO(CAN);
427 extern ISR_IRQ_PROTO(MCI);
428 extern ISR_IRQ_PROTO(DMA);
429 
430 extern ISR_IRQ_PROTO(TIMER2);
431 extern ISR_IRQ_PROTO(TIMER3);
432 extern ISR_IRQ_PROTO(UART2);
433 extern ISR_IRQ_PROTO(UART3);
434 extern ISR_IRQ_PROTO(I2C2);
435 extern ISR_IRQ_PROTO(I2S);
436 #else /*(i_MCU_MODEL < 2300)*/
437 extern ISR_IRQ_PROTO(CAN1_TX);
438 extern ISR_IRQ_PROTO(CAN2_TX);
439 extern ISR_IRQ_PROTO(CAN3_TX);
440 extern ISR_IRQ_PROTO(CAN4_TX);
441 /*24 and 25 reserved*/
442 extern ISR_IRQ_PROTO(PROGRAMM_INT24);
443 extern ISR_IRQ_PROTO(PROGRAMM_INT25);
444 
445 extern ISR_IRQ_PROTO(CAN1_RX);
446 extern ISR_IRQ_PROTO(CAN2_RX);
447 extern ISR_IRQ_PROTO(CAN3_RX);
448 extern ISR_IRQ_PROTO(CAN4_RX);
449 #endif
450 /*--------------------------------*/
451 //extern void WDT_IRQHandler(void);
452 // static /*const*/ void ( *ISR_HANDLES_TABLE[] ) (void) = {
453 const ISR_ptr_type ISR_HANDLES_ARRAY[] = {
454  def_IRQHandler_name(WDT),
455  def_IRQHandler_name(PROGRAMM_INT),
456  def_IRQHandler_name(ARM_CORE_ICE_RX),
457  def_IRQHandler_name(ARM_CORE_ICE_TX),
458  def_IRQHandler_name(TIMER0),
459  def_IRQHandler_name(TIMER1),
460  def_IRQHandler_name(UART0),
461  def_IRQHandler_name(UART1),
462 #if (i_MCU_MODEL <= 2100) /*fixme*/
463  def_IRQHandler_name(PWM),
464 #else
465  def_IRQHandler_name(PWM0),
466 #endif
467 #if (i_MCU_MODEL <= 2100) /*fixme*/
468  def_IRQHandler_name(I2C),
469 #else
470  def_IRQHandler_name(I2C0),
471 #endif
472 
473 #if (i_MCU_MODEL <= 2100) /*fixme*/
474  #if (i_MCU_MODEL <= 2100) /*fixme*/
475  def_IRQHandler_name(SPI),
476  #else
477  def_IRQHandler_name(SPI0),
478  #endif
479 #else
480  def_IRQHandler_name(SSP0),
481 #endif
482 
483 #if (i_MCU_MODEL < 2300) /*fixme*/
484  def_IRQHandler_name(SPI1),
485 #else
486  def_IRQHandler_name(SSP1),
487 #endif
488  def_IRQHandler_name(PLL0),
489  def_IRQHandler_name(RTC),
490  def_IRQHandler_name(EINT0),
491  def_IRQHandler_name(EINT1),
492  def_IRQHandler_name(EINT2),
493  def_IRQHandler_name(EINT3),
494  def_IRQHandler_name(ADC),
495 #if (i_MCU_MODEL >= 2300)
496  def_IRQHandler_name(I2C1),
497  def_IRQHandler_name(BOD),
498  def_IRQHandler_name(ENET),
500  def_IRQHandler_name(CAN),
501  def_IRQHandler_name(MCI),
502  def_IRQHandler_name(DMA),
503 
504  def_IRQHandler_name(TIMER2),
505  def_IRQHandler_name(TIMER3),
506  def_IRQHandler_name(UART2),
507  def_IRQHandler_name(UART3),
508  def_IRQHandler_name(I2C2),
509  def_IRQHandler_name(I2S),
510 #else /*(i_MCU_MODEL < 2300)*/
512  def_IRQHandler_name(CAN2_TX),
513  def_IRQHandler_name(CAN3_TX),
514  def_IRQHandler_name(CAN4_TX),
515  /*24 and 25 reserved*/
516  def_IRQHandler_name(PROGRAMM_INT24),
517  def_IRQHandler_name(PROGRAMM_INT25),
518  def_IRQHandler_name(CAN1_RX),
519  def_IRQHandler_name(CAN2_RX),
520  def_IRQHandler_name(CAN3_RX),
521  def_IRQHandler_name(CAN4_RX),
522 #endif
523 };
524 
525 const char sizeof_ISR_HANDLES_ARRAY = (sizeof(ISR_HANDLES_ARRAY)/sizeof(ISR_HANDLES_ARRAY[0]));
526 
527