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CMSIS2000
0.0.7
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CMSIS2000
0.0.7
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Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...
#include <LPC17xx.h>
Data Fields | |
| union { | |
| __IO uint8_t DLL | |
| __I uint8_t RBR | |
| uint32_t RESERVED0 | |
| __O uint8_t THR | |
| }; | |
| union { | |
| __IO uint8_t DLM | |
| __IO uint32_t IER | |
| }; | |
| union { | |
| __O uint8_t FCR | |
| __I uint32_t IIR | |
| }; | |
| __IO uint32_t | ACR |
| __IO uint8_t | FDR |
| __I uint8_t | FIFOLVL |
| __IO uint8_t | ICR |
| __IO uint8_t | LCR |
| __I uint8_t | LSR |
| uint8_t | RESERVED1 [7] |
| uint8_t | RESERVED2 [7] |
| uint8_t | RESERVED3 [3] |
| uint8_t | RESERVED4 [3] |
| uint8_t | RESERVED5 [7] |
| uint8_t | RESERVED6 [39] |
| __IO uint8_t | SCR |
| __IO uint8_t | TER |
Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition.
| union { ... } |
| union { ... } |
| union { ... } |
1.8.1.2 
