CMSIS Core Peripheral Access Layer Header File for ARMCM0plus Device Series. Подробнее...

#include <core_cm0plus.h>
#include "system_ARMCM0plus.h"

Граф включаемых заголовочных файлов для ARMCM0plus.h:

Граф файлов, в которые включается этот файл:

Структуры данных
struct	ARM_CPU_SYS_TypeDef
struct	ARM_DUT_SYS_TypeDef
struct	ARM_TIM_TypeDef
struct	ARM_UART_TypeDef

Макросы
#define	__CM0PLUS_REV 0x0000
#define	__MPU_PRESENT 0
#define	__NVIC_PRIO_BITS 2
#define	__Vendor_SysTickConfig 0
#define	__VTOR_PRESENT 0
#define	ARM_AHB_BASE (0x4FF00000UL)
#define	ARM_APB_BASE (0x40000000UL)
#define	ARM_CPU_CFG_BASE (0xDFFF0000UL)
#define	ARM_CPU_SYS ((ARM_CPU_SYS_TypeDef *) ARM_CPU_SYS_BASE)
#define	ARM_CPU_SYS_BASE (ARM_CPU_CFG_BASE + 0x00000)
#define	ARM_DMC_BASE (0x60000000UL)
#define	ARM_DUT_SYS ((ARM_DUT_SYS_TypeDef *) ARM_DUT_SYS_BASE)
#define	ARM_DUT_SYS_BASE (ARM_APB_BASE + 0x04000)
#define	ARM_FLASH_BASE (0x00000000UL)
#define	ARM_RAM_BASE (0x20000000UL)
#define	ARM_RAM_FPGA_BASE (0x1EFF0000UL)
#define	ARM_SMC_BASE (0xA0000000UL)
#define	ARM_TIM0 (( ARM_TIM_TypeDef *) ARM_TIM0_BASE)
#define	ARM_TIM0_BASE (ARM_APB_BASE + 0x02000)
#define	ARM_TIM2 (( ARM_TIM_TypeDef *) ARM_TIM2_BASE)
#define	ARM_TIM2_BASE (ARM_APB_BASE + 0x03000)
#define	ARM_UART0 (( ARM_UART_TypeDef *) ARM_UART0_BASE)
#define	ARM_UART0_BASE (ARM_APB_BASE + 0x06000)
#define	ARM_UART1 (( ARM_UART_TypeDef *) ARM_UART1_BASE)
#define	ARM_UART1_BASE (ARM_APB_BASE + 0x07000)
#define	ARM_UART2 (( ARM_UART_TypeDef *) ARM_UART2_BASE)
#define	ARM_UART2_BASE (ARM_APB_BASE + 0x08000)
#define	ARM_UART3 (( ARM_UART_TypeDef *) ARM_UART3_BASE)
#define	ARM_UART3_BASE (ARM_CPU_CFG_BASE + 0x05000)
#define	ARM_UART4 (( ARM_UART_TypeDef *) ARM_UART4_BASE)
#define	ARM_UART4_BASE (ARM_APB_BASE + 0x09000)

Определения типов
typedef enum IRQn	IRQn_Type

Перечисления

enum IRQn {
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2,
SysTick_IRQn = -1, WDT_IRQn = 0, RTC_IRQn = 1, TIM0_IRQn = 2,
TIM2_IRQn = 3, MCIA_IRQn = 4, MCIB_IRQn = 5, UART0_IRQn = 6,
UART1_IRQn = 7, UART2_IRQn = 8, UART4_IRQn = 9, AACI_IRQn = 10,
CLCD_IRQn = 11, ENET_IRQn = 12, USBDC_IRQn = 13, USBHC_IRQn = 14,
CHLCD_IRQn = 15, FLEXRAY_IRQn = 16, CAN_IRQn = 17, LIN_IRQn = 18,
I2C_IRQn = 19, CPU_CLCD_IRQn = 28, UART3_IRQn = 30, SPI_IRQn = 31,
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2,
SysTick_IRQn = -1, WDT_IRQn = 0, RTC_IRQn = 1, TIM0_IRQn = 2,
TIM2_IRQn = 3, MCIA_IRQn = 4, MCIB_IRQn = 5, UART0_IRQn = 6,
UART1_IRQn = 7, UART2_IRQn = 8, UART4_IRQn = 9, AACI_IRQn = 10,
CLCD_IRQn = 11, ENET_IRQn = 12, USBDC_IRQn = 13, USBHC_IRQn = 14,
CHLCD_IRQn = 15, FLEXRAY_IRQn = 16, CAN_IRQn = 17, LIN_IRQn = 18,
I2C_IRQn = 19, CPU_CLCD_IRQn = 28, UART3_IRQn = 30, SPI_IRQn = 31,
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
SysTick_IRQn = -1, WDT_IRQn = 0, RTC_IRQn = 1, TIM0_IRQn = 2,
TIM2_IRQn = 3, MCIA_IRQn = 4, MCIB_IRQn = 5, UART0_IRQn = 6,
UART1_IRQn = 7, UART2_IRQn = 8, UART4_IRQn = 9, AACI_IRQn = 10,
CLCD_IRQn = 11, ENET_IRQn = 12, USBDC_IRQn = 13, USBHC_IRQn = 14,
CHLCD_IRQn = 15, FLEXRAY_IRQn = 16, CAN_IRQn = 17, LIN_IRQn = 18,
I2C_IRQn = 19, CPU_CLCD_IRQn = 28, UART3_IRQn = 30, SPI_IRQn = 31,
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
SysTick_IRQn = -1, WDT_IRQn = 0, RTC_IRQn = 1, TIM0_IRQn = 2,
TIM2_IRQn = 3, MCIA_IRQn = 4, MCIB_IRQn = 5, UART0_IRQn = 6,
UART1_IRQn = 7, UART2_IRQn = 8, UART4_IRQn = 9, AACI_IRQn = 10,
CLCD_IRQn = 11, ENET_IRQn = 12, USBDC_IRQn = 13, USBHC_IRQn = 14,
CHLCD_IRQn = 15, FLEXRAY_IRQn = 16, CAN_IRQn = 17, LIN_IRQn = 18,
I2C_IRQn = 19, CPU_CLCD_IRQn = 28, UART3_IRQn = 30, SPI_IRQn = 31,
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2,
SysTick_IRQn = -1, WDT_IRQn = 0, RTC_IRQn = 1, TIM0_IRQn = 2,
TIM2_IRQn = 3, MCIA_IRQn = 4, MCIB_IRQn = 5, UART0_IRQn = 6,
UART1_IRQn = 7, UART2_IRQn = 8, UART4_IRQn = 9, AACI_IRQn = 10,
CLCD_IRQn = 11, ENET_IRQn = 12, USBDC_IRQn = 13, USBHC_IRQn = 14,
CHLCD_IRQn = 15, FLEXRAY_IRQn = 16, CAN_IRQn = 17, LIN_IRQn = 18,
I2C_IRQn = 19, CPU_CLCD_IRQn = 28, UART3_IRQn = 30, SPI_IRQn = 31,
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11,
UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2,
SysTick_IRQn = -1, WDT_IRQn = 0, RTC_IRQn = 1, TIM0_IRQn = 2,
TIM2_IRQn = 3, MCIA_IRQn = 4, MCIB_IRQn = 5, UART0_IRQn = 6,
UART1_IRQn = 7, UART2_IRQn = 8, UART4_IRQn = 9, AACI_IRQn = 10,
CLCD_IRQn = 11, ENET_IRQn = 12, USBDC_IRQn = 13, USBHC_IRQn = 14,
CHLCD_IRQn = 15, FLEXRAY_IRQn = 16, CAN_IRQn = 17, LIN_IRQn = 18,
I2C_IRQn = 19, CPU_CLCD_IRQn = 28, UART3_IRQn = 30, SPI_IRQn = 31,
NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3,
TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7,
UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11,
I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15,
PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19,
EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23,
USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27,
ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31,
PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34, WDT_IRQn = 0,
PROGRAMM_INT_IRQn = 1, ARM_CORE_ICE_RX_IRQn = 2, ARM_CORE_ICE_TX_IRQn = 3, TIMER0_IRQn = 4,
TIMER1_IRQn = 5, UART0_IRQn = 6, UART1_IRQn = 7, PWM_IRQn = 8,
PWM0_IRQn = 8, I2C_IRQn = 9, I2C0_IRQn = 9, SPI_IRQn = 10,
SPI0_IRQn = 10, SSP0_IRQn = 10, SPI1_IRQn = 11, SSP1_IRQn = 11,
PLL0_IRQn = 12, RTC_IRQn = 13, EINT0_IRQn = 14, EINT1_IRQn = 15,
EINT2_IRQn = 16, EINT3_IRQn = 17, ADC_IRQn = 18, CAN1_TX = 20,
CAN2_TX_IRQn = 21, CAN3_TX_IRQn = 22, CAN4_TX_IRQn = 23, RESERVE_23_IRQn = 24,
RESERVE_24_IRQn = 25, CAN1_RX_IRQn = 26, CAN2_RX_IRQn = 27, CAN3_RX_IRQn = 28,
CAN4_RX_IRQn = 29
}

Подробное описание

CMSIS Core Peripheral Access Layer Header File for ARMCM0plus Device Series.

Версия: V1.00

Дата: 19. March 2012

Заметки: Copyright (C) 2012 ARM Limited. All rights reserved.

: ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.

: THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

См. определение в файле ARMCM0plus.h

Макросы

#define __CM0PLUS_REV 0x0000

Core revision r0p0

См. определение в файле ARMCM0plus.h строка 80

#define __MPU_PRESENT 0

MPU present or not

См. определение в файле ARMCM0plus.h строка 81

#define __NVIC_PRIO_BITS 2

Number of Bits used for Priority Levels

См. определение в файле ARMCM0plus.h строка 83

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick Config is used

См. определение в файле ARMCM0plus.h строка 84

#define __VTOR_PRESENT 0

VTOR present or not

См. определение в файле ARMCM0plus.h строка 82

#define ARM_AHB_BASE (0x4FF00000UL)

См. определение в файле ARMCM0plus.h строка 230

#define ARM_APB_BASE (0x40000000UL)

См. определение в файле ARMCM0plus.h строка 229

#define ARM_CPU_CFG_BASE (0xDFFF0000UL)

См. определение в файле ARMCM0plus.h строка 223

#define ARM_CPU_SYS ((ARM_CPU_SYS_TypeDef *) ARM_CPU_SYS_BASE)

См. определение в файле ARMCM0plus.h строка 247

#define ARM_CPU_SYS_BASE (ARM_CPU_CFG_BASE + 0x00000)

См. определение в файле ARMCM0plus.h строка 225

#define ARM_DMC_BASE (0x60000000UL)

См. определение в файле ARMCM0plus.h строка 231

#define ARM_DUT_SYS ((ARM_DUT_SYS_TypeDef *) ARM_DUT_SYS_BASE)

См. определение в файле ARMCM0plus.h строка 251

#define ARM_DUT_SYS_BASE (ARM_APB_BASE + 0x04000)

См. определение в файле ARMCM0plus.h строка 236

#define ARM_FLASH_BASE (0x00000000UL)

См. определение в файле ARMCM0plus.h строка 220

#define ARM_RAM_BASE (0x20000000UL)

См. определение в файле ARMCM0plus.h строка 221

#define ARM_RAM_FPGA_BASE (0x1EFF0000UL)

См. определение в файле ARMCM0plus.h строка 222

#define ARM_SMC_BASE (0xA0000000UL)

См. определение в файле ARMCM0plus.h строка 232

#define ARM_TIM0 (( ARM_TIM_TypeDef *) ARM_TIM0_BASE)

См. определение в файле ARMCM0plus.h строка 252

#define ARM_TIM0_BASE (ARM_APB_BASE + 0x02000)

См. определение в файле ARMCM0plus.h строка 234

#define ARM_TIM2 (( ARM_TIM_TypeDef *) ARM_TIM2_BASE)

См. определение в файле ARMCM0plus.h строка 253

#define ARM_TIM2_BASE (ARM_APB_BASE + 0x03000)

См. определение в файле ARMCM0plus.h строка 235

#define ARM_UART0 (( ARM_UART_TypeDef *) ARM_UART0_BASE)

См. определение в файле ARMCM0plus.h строка 254

#define ARM_UART0_BASE (ARM_APB_BASE + 0x06000)

См. определение в файле ARMCM0plus.h строка 237

#define ARM_UART1 (( ARM_UART_TypeDef *) ARM_UART1_BASE)

См. определение в файле ARMCM0plus.h строка 255

#define ARM_UART1_BASE (ARM_APB_BASE + 0x07000)

См. определение в файле ARMCM0plus.h строка 238

#define ARM_UART2 (( ARM_UART_TypeDef *) ARM_UART2_BASE)

См. определение в файле ARMCM0plus.h строка 256

#define ARM_UART2_BASE (ARM_APB_BASE + 0x08000)

См. определение в файле ARMCM0plus.h строка 239

#define ARM_UART3 (( ARM_UART_TypeDef *) ARM_UART3_BASE)

См. определение в файле ARMCM0plus.h строка 248

#define ARM_UART3_BASE (ARM_CPU_CFG_BASE + 0x05000)

См. определение в файле ARMCM0plus.h строка 226

#define ARM_UART4 (( ARM_UART_TypeDef *) ARM_UART4_BASE)

См. определение в файле ARMCM0plus.h строка 257

#define ARM_UART4_BASE (ARM_APB_BASE + 0x09000)

См. определение в файле ARMCM0plus.h строка 240

Типы

typedef enum IRQn IRQn_Type

Перечисления

enum IRQn

Элементы перечислений:

NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 HardFault Interrupt
SVCall_IRQn	11 SV Call Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
RTC_IRQn	Real Time Clock Interrupt
TIM0_IRQn	Timer0 / Timer1 Interrupt
TIM2_IRQn	Timer2 / Timer3 Interrupt
MCIA_IRQn	MCIa Interrupt
MCIB_IRQn	MCIb Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART4_IRQn	UART4 Interrupt
AACI_IRQn	AACI / AC97 Interrupt
CLCD_IRQn	CLCD Combined Interrupt
ENET_IRQn	Ethernet Interrupt
USBDC_IRQn	USB Device Interrupt
USBHC_IRQn	USB Host Controller Interrupt
CHLCD_IRQn	Character LCD Interrupt
FLEXRAY_IRQn	Flexray Interrupt
CAN_IRQn	CAN Interrupt
LIN_IRQn	LIN Interrupt
I2C_IRQn	I2C ADC/DAC Interrupt
CPU_CLCD_IRQn	CPU CLCD Combined Interrupt
UART3_IRQn	UART3 Interrupt
SPI_IRQn	SPI Touchscreen Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 HardFault Interrupt
SVCall_IRQn	11 SV Call Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
RTC_IRQn	Real Time Clock Interrupt
TIM0_IRQn	Timer0 / Timer1 Interrupt
TIM2_IRQn	Timer2 / Timer3 Interrupt
MCIA_IRQn	MCIa Interrupt
MCIB_IRQn	MCIb Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART4_IRQn	UART4 Interrupt
AACI_IRQn	AACI / AC97 Interrupt
CLCD_IRQn	CLCD Combined Interrupt
ENET_IRQn	Ethernet Interrupt
USBDC_IRQn	USB Device Interrupt
USBHC_IRQn	USB Host Controller Interrupt
CHLCD_IRQn	Character LCD Interrupt
FLEXRAY_IRQn	Flexray Interrupt
CAN_IRQn	CAN Interrupt
LIN_IRQn	LIN Interrupt
I2C_IRQn	I2C ADC/DAC Interrupt
CPU_CLCD_IRQn	CPU CLCD Combined Interrupt
UART3_IRQn	UART3 Interrupt
SPI_IRQn	SPI Touchscreen Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 HardFault Interrupt
MemoryManagement_IRQn	4 Memory Management Interrupt
BusFault_IRQn	5 Bus Fault Interrupt
UsageFault_IRQn	6 Usage Fault Interrupt
SVCall_IRQn	11 SV Call Interrupt
DebugMonitor_IRQn	12 Debug Monitor Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
RTC_IRQn	Real Time Clock Interrupt
TIM0_IRQn	Timer0 / Timer1 Interrupt
TIM2_IRQn	Timer2 / Timer3 Interrupt
MCIA_IRQn	MCIa Interrupt
MCIB_IRQn	MCIb Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART4_IRQn	UART4 Interrupt
AACI_IRQn	AACI / AC97 Interrupt
CLCD_IRQn	CLCD Combined Interrupt
ENET_IRQn	Ethernet Interrupt
USBDC_IRQn	USB Device Interrupt
USBHC_IRQn	USB Host Controller Interrupt
CHLCD_IRQn	Character LCD Interrupt
FLEXRAY_IRQn	Flexray Interrupt
CAN_IRQn	CAN Interrupt
LIN_IRQn	LIN Interrupt
I2C_IRQn	I2C ADC/DAC Interrupt
CPU_CLCD_IRQn	CPU CLCD Combined Interrupt
UART3_IRQn	UART3 Interrupt
SPI_IRQn	SPI Touchscreen Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 HardFault Interrupt
MemoryManagement_IRQn	4 Memory Management Interrupt
BusFault_IRQn	5 Bus Fault Interrupt
UsageFault_IRQn	6 Usage Fault Interrupt
SVCall_IRQn	11 SV Call Interrupt
DebugMonitor_IRQn	12 Debug Monitor Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
RTC_IRQn	Real Time Clock Interrupt
TIM0_IRQn	Timer0 / Timer1 Interrupt
TIM2_IRQn	Timer2 / Timer3 Interrupt
MCIA_IRQn	MCIa Interrupt
MCIB_IRQn	MCIb Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART4_IRQn	UART4 Interrupt
AACI_IRQn	AACI / AC97 Interrupt
CLCD_IRQn	CLCD Combined Interrupt
ENET_IRQn	Ethernet Interrupt
USBDC_IRQn	USB Device Interrupt
USBHC_IRQn	USB Host Controller Interrupt
CHLCD_IRQn	Character LCD Interrupt
FLEXRAY_IRQn	Flexray Interrupt
CAN_IRQn	CAN Interrupt
LIN_IRQn	LIN Interrupt
I2C_IRQn	I2C ADC/DAC Interrupt
CPU_CLCD_IRQn	CPU CLCD Combined Interrupt
UART3_IRQn	UART3 Interrupt
SPI_IRQn	SPI Touchscreen Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 HardFault Interrupt
SVCall_IRQn	11 SV Call Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
RTC_IRQn	Real Time Clock Interrupt
TIM0_IRQn	Timer0 / Timer1 Interrupt
TIM2_IRQn	Timer2 / Timer3 Interrupt
MCIA_IRQn	MCIa Interrupt
MCIB_IRQn	MCIb Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART4_IRQn	UART4 Interrupt
AACI_IRQn	AACI / AC97 Interrupt
CLCD_IRQn	CLCD Combined Interrupt
ENET_IRQn	Ethernet Interrupt
USBDC_IRQn	USB Device Interrupt
USBHC_IRQn	USB Host Controller Interrupt
CHLCD_IRQn	Character LCD Interrupt
FLEXRAY_IRQn	Flexray Interrupt
CAN_IRQn	CAN Interrupt
LIN_IRQn	LIN Interrupt
I2C_IRQn	I2C ADC/DAC Interrupt
CPU_CLCD_IRQn	CPU CLCD Combined Interrupt
UART3_IRQn	UART3 Interrupt
SPI_IRQn	SPI Touchscreen Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
HardFault_IRQn	3 HardFault Interrupt
MemoryManagement_IRQn	4 Memory Management Interrupt
BusFault_IRQn	5 Bus Fault Interrupt
UsageFault_IRQn	6 Usage Fault Interrupt
SVCall_IRQn	11 SV Call Interrupt
DebugMonitor_IRQn	12 Debug Monitor Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
RTC_IRQn	Real Time Clock Interrupt
TIM0_IRQn	Timer0 / Timer1 Interrupt
TIM2_IRQn	Timer2 / Timer3 Interrupt
MCIA_IRQn	MCIa Interrupt
MCIB_IRQn	MCIb Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART4_IRQn	UART4 Interrupt
AACI_IRQn	AACI / AC97 Interrupt
CLCD_IRQn	CLCD Combined Interrupt
ENET_IRQn	Ethernet Interrupt
USBDC_IRQn	USB Device Interrupt
USBHC_IRQn	USB Host Controller Interrupt
CHLCD_IRQn	Character LCD Interrupt
FLEXRAY_IRQn	Flexray Interrupt
CAN_IRQn	CAN Interrupt
LIN_IRQn	LIN Interrupt
I2C_IRQn	I2C ADC/DAC Interrupt
CPU_CLCD_IRQn	CPU CLCD Combined Interrupt
UART3_IRQn	UART3 Interrupt
SPI_IRQn	SPI Touchscreen Interrupt
NonMaskableInt_IRQn	2 Non Maskable Interrupt
MemoryManagement_IRQn	4 Cortex-M3 Memory Management Interrupt
BusFault_IRQn	5 Cortex-M3 Bus Fault Interrupt
UsageFault_IRQn	6 Cortex-M3 Usage Fault Interrupt
SVCall_IRQn	11 Cortex-M3 SV Call Interrupt
DebugMonitor_IRQn	12 Cortex-M3 Debug Monitor Interrupt
PendSV_IRQn	14 Cortex-M3 Pend SV Interrupt
SysTick_IRQn	15 Cortex-M3 System Tick Interrupt
WDT_IRQn	Watchdog Timer Interrupt
TIMER0_IRQn	Timer0 Interrupt
TIMER1_IRQn	Timer1 Interrupt
TIMER2_IRQn	Timer2 Interrupt
TIMER3_IRQn	Timer3 Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
UART2_IRQn	UART2 Interrupt
UART3_IRQn	UART3 Interrupt
PWM1_IRQn	PWM1 Interrupt
I2C0_IRQn	I2C0 Interrupt
I2C1_IRQn	I2C1 Interrupt
I2C2_IRQn	I2C2 Interrupt
SPI_IRQn	SPI Interrupt
SSP0_IRQn	SSP0 Interrupt
SSP1_IRQn	SSP1 Interrupt
PLL0_IRQn	PLL0 Lock (Main PLL) Interrupt
RTC_IRQn	Real Time Clock Interrupt
EINT0_IRQn	External Interrupt 0 Interrupt
EINT1_IRQn	External Interrupt 1 Interrupt
EINT2_IRQn	External Interrupt 2 Interrupt
EINT3_IRQn	External Interrupt 3 Interrupt
ADC_IRQn	A/D Converter Interrupt
BOD_IRQn	Brown-Out Detect Interrupt
USB_IRQn	USB Interrupt
CAN_IRQn	CAN Interrupt
DMA_IRQn	General Purpose DMA Interrupt
I2S_IRQn	I2S Interrupt
ENET_IRQn	Ethernet Interrupt
RIT_IRQn	Repetitive Interrupt Timer Interrupt
MCPWM_IRQn	Motor Control PWM Interrupt
QEI_IRQn	Quadrature Encoder Interface Interrupt
PLL1_IRQn	PLL1 Lock (USB PLL) Interrupt
USBActivity_IRQn	USB Activity Interrupt
CANActivity_IRQn	CAN Activity Interrupt
WDT_IRQn	Watchdog Timer Interrupt
PROGRAMM_INT_IRQn
ARM_CORE_ICE_RX_IRQn
ARM_CORE_ICE_TX_IRQn
TIMER0_IRQn	Timer0 Interrupt
TIMER1_IRQn	Timer1 Interrupt
UART0_IRQn	UART0 Interrupt
UART1_IRQn	UART1 Interrupt
PWM_IRQn	PWM Interrupt
PWM0_IRQn	PWM0 Interrupt
I2C_IRQn	I2C Interrupt
I2C0_IRQn	I2C0 Interrupt
SPI_IRQn	SPI Interrupt
SPI0_IRQn	SPI0 Interrupt
SSP0_IRQn	SSP0 Interrupt
SPI1_IRQn	SPI1 Interrupt
SSP1_IRQn	SSP1 Interrupt
PLL0_IRQn	PLL0 Lock (Main PLL) Interrupt
RTC_IRQn	Real Time Clock Interrupt
EINT0_IRQn	External Interrupt 0 Interrupt
EINT1_IRQn	External Interrupt 1 Interrupt
EINT2_IRQn	External Interrupt 2 Interrupt
EINT3_IRQn	External Interrupt 3 Interrupt
ADC_IRQn	A/D Converter Interrupt
CAN1_TX
CAN2_TX_IRQn
CAN3_TX_IRQn
CAN4_TX_IRQn
RESERVE_23_IRQn
RESERVE_24_IRQn
CAN1_RX_IRQn
CAN2_RX_IRQn
CAN3_RX_IRQn
CAN4_RX_IRQn

См. определение в файле ARMCM0plus.h строка 35

Структуры данных

Макросы

Определения типов

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Подробное описание

Макросы

Типы

Перечисления