|
CMSIS2000
0.0.7
|
| Представлены макросы и документация для различных процессоров и микроконтроллеров | |
| Дано описание макросов определяющих платформу | |
| Описание POSIX совместимой ОС в виде платформы | |
| Описание ОС WINDOWS совместимой ОС в виде платформы | |
| Описание ядра AVR | |
| Описание ядра ARM7 | |
| Описание семейства LPC2xxx от NXP(Philips) | |
| Atmel.. | |
| Платфоромнезависимое создание и объявление обработчиков прерываний и исключений | |
| Конфигурация, настройки описание, код для поддержки плат | |
| Описание платы EA_v1_1 | |
| Общий файл для описания платы | |
| Описание платы EA_v1_1 | |
| Общий файл для описания платы | |
| Описание платы LPC1766-STK | |
| Описание платы SK-MLPC1768 | |
| Общий файл для описания платы | |
| Далее приведены группы из оригинального исходного кода CMSIS | |
| This set of functions provides a fast approximation to sine, cosine, and square root | |
| Computes the square root of a number | |
| This set of functions operates on complex data vectors | |
| This set of functions provides basic matrix math operations | |
| A Proportional Integral Derivative (PID) controller is a generic feedback control loop mechanism widely used in industrial control systems | |
| Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector | |
| Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases | |
| Forward Park transform converts the input two-coordinate vector to flux and torque components | |
| Inverse Park transform converts the input flux and torque components to two-coordinate vector | |
| These functions perform 1- and 2-dimensional interpolation of data | |
| Linear interpolation is a method of curve fitting using linear polynomials | |
| Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid | |
| List of Lint messages which will be suppressed and not shown: | |
| Access to dedicated SIMD instructions | |
| Access to dedicated instructions | |
| IO Type Qualifiers are used | |
| Type definitions and defines for Cortex-M processor based devices | |
| Core Register type definitions | |
| Type definitions for the NVIC Registers | |
| Type definitions for the System Control Block Registers | |
| Type definitions for the System Timer Registers | |
| Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor | |
| Definitions for base addresses, unions, and structures | |
| Type definitions for the System Control and ID Register not in the SCB | |
| Type definitions for the Instrumentation Trace Macrocell (ITM) | |
| Type definitions for the Data Watchpoint and Trace (DWT) | |
| Type definitions for the Trace Port Interface (TPI) | |
| Functions that manage interrupts and exceptions via the NVIC | |
| Functions that configure the System | |
| Functions that access the ITM debug interface | |
| NXP PLCK divider NXP PCLK Peripheral Clock devider -> PLCK divider (VPB bus clock dividers) Bit1 Bit0 Description 0 0 cclk/4 (1/4 From CPU CLOCK) 0 1 cclk/1 (No division) 1 0 cclk/2 (1/2 From CPU CLOCK) 1 1 cclk/6 or cclk/8 | |
| This file defines all structures and symbols for CMSIS core: | |