CMSIS2000  0.0.7
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startup_ARMSC300.s
См. документацию.
1 ;/**************************************************************************//**
2 ; * @file startup_ARMSC300.s
3 ; * @brief CMSIS Core Device Startup File for
4 ; * for ARMSC300 Device Series
5 ; * @version V1.07
6 ; * @date 30. January 2012
7 ; *
8 ; * @note
9 ; * Copyright (C) 2012 ARM Limited. All rights reserved.
10 ; *
11 ; * @par
12 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M
13 ; * processor based microcontrollers. This file can be freely distributed
14 ; * within development tools that are supporting such ARM based processors.
15 ; *
16 ; * @par
17 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
21 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 ; *
23 ; ******************************************************************************/
24 
25 
26 ;
27 ; The modules in this file are included in the libraries, and may be replaced
28 ; by any user-defined modules that define the PUBLIC symbol _program_start or
29 ; a user defined start symbol.
30 ; To override the cstartup defined in the library, simply add your modified
31 ; version to the workbench project.
32 ;
33 ; The vector table is normally located at address 0.
34 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
35 ; The name "__vector_table" has special meaning for C-SPY:
36 ; it is where the SP start value is found, and the NVIC vector
37 ; table register (VTOR) is initialized to this address if != 0.
38 ;
39 ; Cortex-M version
40 ;
41 
42  MODULE ?cstartup
43 
44  ;; Forward declaration of sections.
45  SECTION CSTACK:DATA:NOROOT(3)
46 
47  SECTION .intvec:CODE:NOROOT(2)
48 
49  EXTERN __iar_program_start
50  EXTERN SystemInit
51  PUBLIC __vector_table
52  PUBLIC __vector_table_0x1c
53  PUBLIC __Vectors
54  PUBLIC __Vectors_End
55  PUBLIC __Vectors_Size
56 
57  DATA
58 
59 __vector_table
60  DCD sfe(CSTACK)
61  DCD Reset_Handler
62 
63  DCD NMI_Handler
64  DCD HardFault_Handler
65  DCD MemManage_Handler
66  DCD BusFault_Handler
67  DCD UsageFault_Handler
68 __vector_table_0x1c
69  DCD 0
70  DCD 0
71  DCD 0
72  DCD 0
73  DCD SVC_Handler
74  DCD DebugMon_Handler
75  DCD 0
76  DCD PendSV_Handler
77  DCD SysTick_Handler
78 
79  ; External Interrupts
80  DCD WDT_IRQHandler ; 0: Watchdog Timer
81  DCD RTC_IRQHandler ; 1: Real Time Clock
82  DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
83  DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
84  DCD MCIA_IRQHandler ; 4: MCIa
85  DCD MCIB_IRQHandler ; 5: MCIb
86  DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
87  DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
88  DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
89  DCD UART4_IRQHandler ; 9: UART4 - not connected
90  DCD AACI_IRQHandler ; 10: AACI / AC97
91  DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
92  DCD ENET_IRQHandler ; 12: Ethernet
93  DCD USBDC_IRQHandler ; 13: USB Device
94  DCD USBHC_IRQHandler ; 14: USB Host Controller
95  DCD CHLCD_IRQHandler ; 15: Character LCD
96  DCD FLEXRAY_IRQHandler ; 16: Flexray
97  DCD CAN_IRQHandler ; 17: CAN
98  DCD LIN_IRQHandler ; 18: LIN
99  DCD I2C_IRQHandler ; 19: I2C ADC/DAC
100  DCD 0 ; 20: Reserved
101  DCD 0 ; 21: Reserved
102  DCD 0 ; 22: Reserved
103  DCD 0 ; 23: Reserved
104  DCD 0 ; 24: Reserved
105  DCD 0 ; 25: Reserved
106  DCD 0 ; 26: Reserved
107  DCD 0 ; 27: Reserved
108  DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
109  DCD 0 ; 29: Reserved - CPU FPGA
110  DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
111  DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
112 __Vectors_End
113 
114 __Vectors EQU __vector_table
115 __Vectors_Size EQU __Vectors_End - __Vectors
116 
117 
118 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
119 ;;
120 ;; Default interrupt handlers.
121 ;;
122  THUMB
123 
124  PUBWEAK Reset_Handler
125  SECTION .text:CODE:REORDER(2)
126 Reset_Handler
127  LDR R0, =SystemInit
128  BLX R0
129  LDR R0, =__iar_program_start
130  BX R0
131 
132  PUBWEAK NMI_Handler
133  SECTION .text:CODE:REORDER(1)
134 NMI_Handler
135  B NMI_Handler
136 
137  PUBWEAK HardFault_Handler
138  SECTION .text:CODE:REORDER(1)
139 HardFault_Handler
140  B HardFault_Handler
141 
142  PUBWEAK MemManage_Handler
143  SECTION .text:CODE:REORDER(1)
144 MemManage_Handler
145  B MemManage_Handler
146 
147  PUBWEAK BusFault_Handler
148  SECTION .text:CODE:REORDER(1)
149 BusFault_Handler
150  B BusFault_Handler
151 
152  PUBWEAK UsageFault_Handler
153  SECTION .text:CODE:REORDER(1)
154 UsageFault_Handler
155  B UsageFault_Handler
156 
157  PUBWEAK SVC_Handler
158  SECTION .text:CODE:REORDER(1)
159 SVC_Handler
160  B SVC_Handler
161 
162  PUBWEAK DebugMon_Handler
163  SECTION .text:CODE:REORDER(1)
164 DebugMon_Handler
165  B DebugMon_Handler
166 
167  PUBWEAK PendSV_Handler
168  SECTION .text:CODE:REORDER(1)
169 PendSV_Handler
170  B PendSV_Handler
171 
172  PUBWEAK SysTick_Handler
173  SECTION .text:CODE:REORDER(1)
174 SysTick_Handler
175  B SysTick_Handler
176 
177  PUBWEAK WDT_IRQHandler
178  SECTION .text:CODE:REORDER(1)
179 WDT_IRQHandler
180  B WDT_IRQHandler
181 
182  PUBWEAK RTC_IRQHandler
183  SECTION .text:CODE:REORDER(1)
184 RTC_IRQHandler
185  B RTC_IRQHandler
186 
187  PUBWEAK TIM0_IRQHandler
188  SECTION .text:CODE:REORDER(1)
189 TIM0_IRQHandler
190  B TIM0_IRQHandler
191 
192  PUBWEAK TIM2_IRQHandler
193  SECTION .text:CODE:REORDER(1)
194 TIM2_IRQHandler
195  B TIM2_IRQHandler
196 
197  PUBWEAK MCIA_IRQHandler
198  SECTION .text:CODE:REORDER(1)
199 MCIA_IRQHandler
200  B MCIA_IRQHandler
201 
202  PUBWEAK MCIB_IRQHandler
203  SECTION .text:CODE:REORDER(1)
204 MCIB_IRQHandler
205  B MCIB_IRQHandler
206 
207  PUBWEAK UART0_IRQHandler
208  SECTION .text:CODE:REORDER(1)
209 UART0_IRQHandler
210  B UART0_IRQHandler
211 
212  PUBWEAK UART1_IRQHandler
213  SECTION .text:CODE:REORDER(1)
214 UART1_IRQHandler
215  B UART1_IRQHandler
216 
217  PUBWEAK UART2_IRQHandler
218  SECTION .text:CODE:REORDER(1)
219 UART2_IRQHandler
220  B UART2_IRQHandler
221 
222  PUBWEAK UART4_IRQHandler
223  SECTION .text:CODE:REORDER(1)
224 UART4_IRQHandler
225  B UART4_IRQHandler
226 
227  PUBWEAK AACI_IRQHandler
228  SECTION .text:CODE:REORDER(1)
229 AACI_IRQHandler
230  B AACI_IRQHandler
231 
232  PUBWEAK CLCD_IRQHandler
233  SECTION .text:CODE:REORDER(1)
234 CLCD_IRQHandler
235  B CLCD_IRQHandler
236 
237  PUBWEAK ENET_IRQHandler
238  SECTION .text:CODE:REORDER(1)
239 ENET_IRQHandler
240  B ENET_IRQHandler
241 
242  PUBWEAK USBDC_IRQHandler
243  SECTION .text:CODE:REORDER(1)
244 USBDC_IRQHandler
245  B USBDC_IRQHandler
246 
247  PUBWEAK USBHC_IRQHandler
248  SECTION .text:CODE:REORDER(1)
249 USBHC_IRQHandler
250  B USBHC_IRQHandler
251 
252  PUBWEAK CHLCD_IRQHandler
253  SECTION .text:CODE:REORDER(1)
254 CHLCD_IRQHandler
255  B CHLCD_IRQHandler
256 
257  PUBWEAK FLEXRAY_IRQHandler
258  SECTION .text:CODE:REORDER(1)
259 FLEXRAY_IRQHandler
260  B FLEXRAY_IRQHandler
261 
262  PUBWEAK CAN_IRQHandler
263  SECTION .text:CODE:REORDER(1)
264 CAN_IRQHandler
265  B CAN_IRQHandler
266 
267  PUBWEAK LIN_IRQHandler
268  SECTION .text:CODE:REORDER(1)
269 LIN_IRQHandler
270  B LIN_IRQHandler
271 
272  PUBWEAK I2C_IRQHandler
273  SECTION .text:CODE:REORDER(1)
274 I2C_IRQHandler
275  B I2C_IRQHandler
276 
277  PUBWEAK CPU_CLCD_IRQHandler
278  SECTION .text:CODE:REORDER(1)
279 CPU_CLCD_IRQHandler
280  B CPU_CLCD_IRQHandler
281 
282  PUBWEAK UART3_IRQHandler
283  SECTION .text:CODE:REORDER(1)
284 UART3_IRQHandler
285  B UART3_IRQHandler
286 
287  PUBWEAK SPI_IRQHandler
288  SECTION .text:CODE:REORDER(1)
289 SPI_IRQHandler
290  B SPI_IRQHandler
291 
292  END