CMSIS2000  0.0.7
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cmsis_nxp_port_freeRTOS.h
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1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 #ifndef CMSIS_NXP_PORT_FREERTOS_H_
33 #define CMSIS_NXP_PORT_FREERTOS_H_ 1
34 /*-----------------FOR port.c ------------------------------------------------*/
35 #include "LPC2xxx.h"
36 /*
37 #ifndef PCLKSEL0
38  #define PCLKSEL0 LPC_SC->PCLKSEL0
39 #endif
40 #ifndef T0TCR
41  #define T0TCR LPC_TIM0->TCR
42 #endif
43 #ifndef CTCR
44  #define CTCR LPC_TIM0->CTCR
45 #endif
46 #ifndef T0PR
47  #define T0PR LPC_TIM0->PR
48 #endif
49 #ifndef T0IR
50  #define T0IR LPC_TIM0->IR
51 #endif
52 #ifndef T0MR1
53  #define T0MR1 LPC_TIM0->MR1
54 #endif
55 #ifndef T0MCR
56  #define T0MCR LPC_TIM0->MCR
57 #endif
58 #ifndef VICIntEnable
59  #define VICIntEnable VIC->IntEnable
60 #endif
61 #ifndef VICVectAddr4
62  #define VICVectAddr4 VIC->VectAddr[4]
63 #endif
64 #ifndef VICVectCntl4
65  #define VICVectCntl4 VIC->VectCntl[4]
66 #endif
67 #ifndef VICVectAddr
68  #define VICVectAddr VIC->VectAddress
69 #endif
70 */
71 #define vPortYieldProcessor SWI_Handler
72 /*----------------------------------------------------------------------------*/
73 #endif /* CMSIS_NXP_PORT_FREERTOS_H_ */