core_7tdmi.h

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/*
 *  CMSIS2000
 *  CMSIS-like sources for LPC2xxx series MCUs
 *
 *  (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
 *
 *  Version: 0.0.7
 *  Date of the Last Update:  2013-03-04
 *  
 *  Permission is hereby granted, free of charge, to any person obtaining a copy
 *  of this software and associated documentation files (the "Software"), to
 *  deal in the Software without restriction, including without limitation the
 *  rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
 *  sell copies of the Software, and to permit persons to whom the Software is
 *  furnished to do so, subject to the following conditions:
 *
 *  The above copyright notice and this permission notice shall be included in
 *  all copies or substantial portions of the Software.
 *
 *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 *  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 *  IN THE SOFTWARE.
 *
 *  Do not be lasy! For the latest version see http://irtos.sourceforge.net .
 *
 *  
#*/
#if defined ( __ICCARM__ )
 #pragma system_include
#endif

#ifdef __cplusplus
 extern "C" {
#endif

#ifndef __CORE_7TDMI_H_GENERIC
#define __CORE_7TDMI_H_GENERIC

/** @addtogroup CMSIS_core_LintCinfiguration CMSIS Core Lint Configuration
  List of Lint messages which will be suppressed and not shown:
    - not yet checked
  .
  Note:  To re-enable a Message, insert a space before 'lint' *

 */


/*******************************************************************************
 *                 CMSIS definitions
 ******************************************************************************/
/** @addtogroup CMSIS_core_definitions_LPC2xxx CMSIS Core Definitions for LPC2xxx
  This file defines all structures and symbols for CMSIS core:
   - CMSIS version number
   - Cortex-M core
   - Cortex-M core Revision Number
   \ingroup LPC2xxx_System
  @{
 */

/*  CMSIS CM3 definitions */
#define __CM3_CMSIS_VERSION_MAIN  (0x02) /*!< [31:16] CMSIS HAL main version */
#define __CM3_CMSIS_VERSION_SUB   (0x00) /*!< [15:0]  CMSIS HAL sub version  */
#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number       */

#define __CORTEX_M                (-1) /*!< Cortex core*/

#if defined ( __CC_ARM   )
  #define __ASM            __asm        /*!< asm keyword for ARM Compiler */
  #define __INLINE         __inline     /*!< inline keyword for ARM Compiler */
  #define __STATIC_INLINE  static __inline

#elif defined ( __ICCARM__ )
  #define __ASM           __asm         /*!< asm keyword for IAR Compiler */
  #define __INLINE        inline        /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
  #define __STATIC_INLINE  static inline

#elif defined ( __TMS470__ )
  #define __ASM            __asm       /*!< asm keyword for TI CCS Compiler       */
  #define __STATIC_INLINE  static inline

#elif defined   (  __GNUC__  )
  #define __ASM            __asm        /*!< asm keyword for GNU Compiler */
  #define __INLINE         inline       /*!< inline keyword for GNU Compiler */
  #define __STATIC_INLINE  static inline

#elif defined   (  __TASKING__  )
  #define __ASM            __asm        /*!< asm keyword for TASKING Compiler */
  #define __INLINE         inline       /*!< inline keyword for TASKING Compiler   */
  #define __STATIC_INLINE  static inline

#endif

#include <stdint.h>             /*!< standard types definitions */

#include "core_7tdmiInstr.h"    /*!< Core Instruction Access */
#include "core_7tdmiFunc.h"     /*!< Core Function Access */
#include "core_7tdmiInterrupt.h"        /*!< exeptions and interrupt subroutines macroses */



#endif /* __CORE_7TDMI_H_GENERIC */

#ifndef __CMSIS_GENERIC

//#define __CMSIS_GENERIC

#ifndef __CORE_7TDMI_H_DEPENDANT
#define __CORE_7TDMI_H_DEPENDANT

/* IO definitions (access restrictions to peripheral registers) */
#ifdef __cplusplus
  #define     __I     volatile           /*!< defines 'read only' permissions */
#else
  #define     __I     volatile const     /*!< defines 'read only' permissions */
#endif
#define     __O     volatile             /*!< defines 'write only' permissions */
#define     __IO    volatile             /*!< defines 'read / write' permissions */

/*@} end of group CMSIS_core_definitions */

/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
 */
typedef union
{
  struct
  {
    uint32_t M:5;    /*!< bit:  0.. 4  Mode number*/

    uint32_t T:1;    /*!< bit:     5  Thumb bit       */
    uint32_t F:1;    /*!< bit:     6  FIQ bit     */
    uint32_t I:1;    /*!< bit:     7  Interrupt bit    */

    uint32_t _reserved0:20;    /*!< bit:  8..27  Reserved */
    uint32_t V:1;    /*!< bit:     28  Overflow condition code flag*/
    uint32_t C:1;    /*!< bit:     29  Carry condition code flag*/
    uint32_t Z:1;    /*!< bit:     30  Zero condition code flag*/
    uint32_t N:1;    /*!< bit:     31  Negative condition code flag*/
  } b;               /*!< Structure used for bit  access*/
  uint32_t w;        /*!< Type      used for word access*/
} CPSR_Type;

#define CPSR_M_USR 0x10 /* Normal User Mode     */
#define CPSR_M_FIQ 0x11 /* FIQ Processing Fast Interrupts Mode  */
#define CPSR_M_IRQ 0x12 /* IRQ Processing Standard Interrupts Mode */
#define CPSR_M_SVC 0x13 /* Supervisor Processing Software Interrupts Mode */
#define CPSR_M_ABT 0x17 /* Abort Processing memory Faults Mode  */
#define CPSR_M_UND 0x1B /* Undefined Processing Undefined Instructions Mode */
#define CPSR_M_SYS 0x1F /* System Running Priviledged Operating System Tasks  Mode*/

#endif /* __CORE_7TDMI_H_DEPENDANT */

#endif /* __CMSIS_GENERIC */

#ifdef __cplusplus
}
#endif