interrupt.h

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/*
 *  CMSIS2000
 *  CMSIS-like sources for LPC2xxx series MCUs
 *
 *  (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
 *
 *  Version: 0.0.7
 *  Date of the Last Update:  2013-03-04
 *  
 *  Permission is hereby granted, free of charge, to any person obtaining a copy
 *  of this software and associated documentation files (the "Software"), to
 *  deal in the Software without restriction, including without limitation the
 *  rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
 *  sell copies of the Software, and to permit persons to whom the Software is
 *  furnished to do so, subject to the following conditions:
 *
 *  The above copyright notice and this permission notice shall be included in
 *  all copies or substantial portions of the Software.
 *
 *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 *  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 *  IN THE SOFTWARE.
 *
 *  Do not be lasy! For the latest version see http://irtos.sourceforge.net .
 *
 *  
#*/
/** \file
 *\if russian_lng
 *      Файл определяющий макросы прерываний и исключений
 *\else
 *      This file is used to define exeptions and interrupt subroutines macroses for selected arch

 *      \note need to insert iConfig.h or FreeRTOSConfig.h
 *\endif
 */
#ifndef _iARCH_ARM_INTERRUPT_H_
#define _iARCH_ARM_INTERRUPT_H_ 1

#if defined ( __CC_ARM   ) /*------------------ RealView Compiler ------------*/
/* ARM armcc specific functions */
__irq
/* neeed to do separate ISR asm file for inserting OS save/restore context code*/
/* :-(*/
#elif (defined (__ICCARM__)) /*---------------- ICC Compiler -----------------*/
/* IAR iccarm specific functions */

/* neeed to do separate ISR asm file for inserting OS save/restore context code*/
/* :-(*/
#define ISR_HANDLER_PROTO(name)                 \
                        void name (void) __irq

#elif (defined (__GNUC__)) /*------------------ GNU Compiler -----------------*/
/* GNU gcc specific functions */
/** \brief  Enable IRQ Interrupts

  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
  \note Can only be executed in Privileged modes.
 */
__attribute__( ( always_inline ) ) static inline void __enable_irq(void)
{
//  __asm volatile ("cpsie i" : : : "memory"); TODO  check for memory
__asm volatile ("mrs r0, cpsr; bic r0, r0, #0x80; msr cpsr, r0" : : : "r0");
}

/** \brief  Disable IRQ Interrupts

  This function disables IRQ interrupts by setting the I-bit in the CPSR.
  \note Can only be executed in Privileged modes.
 */
__attribute__( ( always_inline ) ) static inline void __disable_irq(void)
{// TODO : : : "memory"); ???? check for memory
  __asm volatile ("mrs r0, cpsr; orr r0, r0, #0x80; msr cpsr, r0" : : : "r0");
}
/** \brief  Enable FIQ

    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
    Can only be executed in Privileged modes.
 */
__attribute__( ( always_inline ) ) static inline void __enable_fault_irq(void)
{
//  __asm volatile ("cpsie i" : : : "memory"); TODO  check for memory
__asm volatile ("mrs r0, cpsr; bic r0, r0, #0x40; msr cpsr, r0" : : : "r0");
}


/** \brief  Disable FIQ

    This function disables FIQ interrupts by setting the F-bit in the CPSR.
    Can only be executed in Privileged modes.
 */
__attribute__( ( always_inline ) ) static inline void __disable_fault_irq(void)
{// TODO : : : "memory"); ???? check for memory
  __asm volatile ("mrs r0, cpsr; orr r0, r0, #0x40; msr cpsr, r0" : : : "r0");
}


#define ISR_HANDLER_PROTO(name)                 \
                        void name (void) __attribute__ ((interrupt("IRQ"),section (".text.keep.vector")))

#define FIQ_HANDLER_PROTO(name)                 \
                        void name (void) __attribute__ ((interrupt("FIQ"),section (".text.keep.vector")))

#define FIQ_HANDLER(name)       void name (void)

#define UNDEF_HANDLER_PROTO(name)                       \
                        void name (void) __attribute__ ((interrupt("UNDEF"),section (".text.keep.vector")))

#define UNDEF_HANDLER(name)     void name (void)


#define SWI_HANDLER_PROTO(name)                 \
                        void name (void) __attribute__ ((interrupt("SWI"),section (".text.keep.vector")))

#define SWI_HANDLER(name)       void name (void)

#ifdef iSCHEDULER_TYPE /* --------------using iRTOS----------------*/

        #if (iSCHEDULER_TYPE == iPREEMPETIVE_SCHEDULER)


        #endif
#endif
#ifdef configUSE_PREEMPTION /* --------------using freeRTOS----------------*/
        #if (configUSE_PREEMPTION == 1)

        #define dri_make_asm_call_here(STRING) \
                __asm volatile ("bl " #STRING)

        /* accoding to CMSIS function name is function_name##_IRQHandler*/
        #define ISR_IRQ_OS_PROTO(function_name) \
                void function_name##_IRQHandler ( void )        \
                                                __attribute__ ((naked,section (".text.keep.vector")));\
                void function_name##_IRQHandler_internal( void )        \
                                                __attribute__ ((noinline)) \

        /* - Save the context of the interrupted task.
         - Call the handler.
         - Restore the context of whichever task is going to run next. */
        #define ISR_IRQ_OS(function_name)       \
                void function_name##_IRQHandler ( void )        \
                {                                       \
                portSAVE_CONTEXT();                     \
                dri_make_asm_call_here (function_name##_IRQHandler_internal) ; \
                portRESTORE_CONTEXT();                          \
                }                               \
                                                \
        void function_name##_IRQHandler_internal( void )


        #endif /* (configUSE_PREEMPTION == 1)*/
#endif /* (configUSE_PREEMPTION*/

#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
/* TASKING carm specific functions */
#endif /*  defined ( __CC_ARM   ) */





/*-------------------------------------------------------------------------*/
#if ((i_MCU_MODEL >= 2000) && (i_MCU_MODEL < 2300))
        #define VICVectAddr_ISR_HOOK()  (*(unsigned int*)(0xFFFFF030)) = 0;
#else
        #define VICVectAddr_ISR_HOOK()  (*(unsigned int*)(0xFFFFFF00)) = 0
#endif

/*- THE DEFAULT PROTOTYPING OF THIS HANDLERS WITHOUT ANY RTOS-----------------*/
#ifndef ISR_EXCEPTION_PROTO
        #define ISR_EXCEPTION_PROTO(name)  ISR_HANDLER_PROTO(name##_Handler)
#endif
#ifndef ISR_EXCEPTION
        #define ISR_EXCEPTION(name)     ISR_IRQhook(name##_Handler)
#endif

#ifndef ISR_IRQ_PROTOint
        #define ISR_IRQ_PROTOint(name)  ISR_HANDLER_PROTO(name##_IRQHandler)
#endif

#ifndef ISR_IRQ_PROTO
        #define ISR_IRQ_PROTO(name)  ISR_IRQ_PROTOint(name)
#endif
#ifndef ISR_IRQhook
        #define ISR_IRQhook(function_name)                                      \
inline static void function_name##_internal( void );    \
                ISR_HANDLER(function_name)                      \
                {                                               \
                        function_name##_internal() ; \
                        VIC->VectAddress = 0;                   \
                };                                              \
        inline static void function_name##_internal( void )
#endif

#ifndef ISR_IRQint
        #define ISR_IRQint(name)        ISR_IRQhook(name##_IRQHandler)
#endif
#ifndef ISR_IRQ
        #define ISR_IRQ(name)           ISR_IRQint(name)
#endif

/*if thumb then
        sub     lr, lr, #4
        push    {r0, r1, r2, r3, r4, fp, ip, lr}
        add     fp, sp, #28
        bl      40003b40 <Handler_internal>
        mov     r3, #-2147483648        ; 0x80000000
        asr     r3, r3, #19
        mov     r2, #0
        str     r2, [r3, #3840] ; 0xf00
        sub     sp, fp, #28
        ldm     sp!, {r0, r1, r2, r3, r4, fp, ip, pc}^

*/
/*      push    {r2, r3}
        mov     r2, #0
        mvn     r3, #3840       ; 0xf00
        str     r2, [r3, #3585] ; 0xe01
        pop     {r2, r3}
        subs    pc, lr, #4
*/
/*
        sub     lr, lr, #4
        push    {r0, r1, r2, r3, ip, lr}
        ldr     r3, [pc, #24]   ; <----adress link here --->>>
        ldr     ip, [r3]
        mov     lr, pc
        bx      ip
        mov     r2, #0
        mvn     r3, #3840       ; 0xf00
        str     r2, [r3, #3585] ; 0xe01
        ldm     sp!, {r0, r1, r2, r3, ip, pc}^
        <--------- here adress ->>>>>>>>>>
*/
/*---here is the copy of upper level -----------------------------------------*/




#endif  /* _iARCH_ARM_INTERRUPT_H_ */