bsp_board_olimex_lpc_1766_stk.h

См. документацию.

/*
 *  CMSIS2000
 *  CMSIS-like sources for LPC2xxx series MCUs
 *
 *  (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
 *
 *  Version: 0.0.7
 *  Date of the Last Update:  2013-03-04
 *  
 *  Permission is hereby granted, free of charge, to any person obtaining a copy
 *  of this software and associated documentation files (the "Software"), to
 *  deal in the Software without restriction, including without limitation the
 *  rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
 *  sell copies of the Software, and to permit persons to whom the Software is
 *  furnished to do so, subject to the following conditions:
 *
 *  The above copyright notice and this permission notice shall be included in
 *  all copies or substantial portions of the Software.
 *
 *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 *  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 *  IN THE SOFTWARE.
 *
 *  Do not be lasy! For the latest version see http://irtos.sourceforge.net .
 *
 *  
#*/

#ifndef BSP_BOARD_DEF_H /*BSP_BOARD_DEF_H must be in every borad_def file*/
#define BSP_BOARD_DEF_H         1
/**
 * \defgroup xg_bsp_board_def_olimex_lpc_1766_stk Olimex  LPC1766-STK board
 * \ingroup xg_bsp_LPC17xx
 *  @{
 *
 *\~russian
 *      Описание платы LPC1766-STK
 *
 *      Плата LPC1766-STK -- отладочная плата от OLIMEX
 *\~english
 *      LPC1766-STK board definition
 *
 *      LPC1766-STK is the board from OLIMEX
 *
 *\~ https://www.olimex.com/Products/ARM/NXP/LPC1766-STK/
 */
#ifndef bsp_board_olimex_lpc_1766_stk /*bsp_board_brd_name must be in every board_def file*/
        #define bsp_board_olimex_lpc_1766_stk   1
#endif
/*-----------i_ is the  i_DENTIFICATION DEFENITIONS --------------------------*/
#define i_ARCH          CM3

#define i_MCU_FAMILY    LPC17xx

#define i_MCU_MODEL     1766

#define i_BOARD         olimex_lpc_1766_stk

#define i_VENDOR        olimex

#define i_VERSION       0x01000B        /* REVISION B version 1*/
/*---------DEFINES THAT PERIPHERIAL DEVICES BOARD HAS ------------------------*/
#define BSP_BOARD_HAS_ETHERNET  1
#define BSP_BOARD_HAS_UART0     1
//#define BSP_BOARD_HAS_UART1   0
//#define BSP_BOARD_HAS_UART2   0
#define BSP_BOARD_HAS_CAN       1
#define BSP_BOARD_HAS_USB       1
#define BSP_BOARD_HAS_USB_HOST  2       /**< board has USB HOST on USB2*/
#define BSP_BOARD_HAS_USB_DEVICE 1      /**< board has USB DEVICE on USB1*/

#define BSP_BOARD_HAS_SDRAM             1

#define BSP_BOARD_HAS_SPI               1
#define BSP_BOARD_HAS_SPI_VS1002D       1
#define BSP_BOARD_HAS_PS2               1

#define BSP_BOARD_HAS_SD                1
#define BSP_BOARD_HAS_MMC               1
/*--------VALUES FOR system_LPC2xxx   ----------------------------------------*/
#define LPC2xxx_VIC_SETUP       1
#define LPC2xxx_CLOCK_SETUP     1
#define LPC2xxx_PLL_SETUP       1

#define XTAL_HZ                 12000000UL
        /* there is three clock soursec in lpc2xxx
        and table here describe sourses and frequency constants.
                CLKSRCSEL_IRC 0         IRC_OSC_HZ
                CLKSRCSEL_XTAL 1        XTAL_HZ
                CLKSRCSEL_RTC 2         RTC_CLK_HZ
         */
        /* select extermal oscillator, as the PLL clock source */
#define CLKSRCSEL_Val           1/*CLKSRCSEL_XTAL*/

/* Fcck = 48Mhz, Fosc = 288Mhz, and USB 48Mhz */
/*Fcck = 2 * (PLL_MValue + 1) * F_OSC_HZ)/(PLL_NValue + 1) /(CCLKCFG_Val + 1))
        Fcck = 2 * 12 * 12 = 288Mhz
        Fosc = Fcck / (CCLKCFG_Val + 1)  = 57.6Mhz --> useful for UART 57600 baud and etc.
        FUSB =  Fcck / (USBCLKDivValue + 1)  = 48Mhz
*/
#define PLL_MValue              11
#define PLL_NValue              0
#define CCLKCFG_Val             5
#define USBCLKCFG_Val           5

/*      example 2
        Fcck = 2 * 20 * 12 = 480Mhz
        Fosc = Fcck / (7 + 1)  = 60.0Mhz
        FUSB =  Fcck / (9 + 1)  = 48.0Mhz

#define PLL_MValue              19
#define PLL_NValue              0
#define CCLKCFG_Val             7
#define USBCLKDivValue          9
*/

/*-----------Peripheral clock selsection -------------------------------------*/
/* let watchdog be at normal freq at CCLK/4 but let timer be at CCLK/1 */
//#ifndef PCLKSEL0_Val
//      #define PCLKSEL0_Val  (LPC2XXX_PCLK_V(WDT,4) | LPC2XXX_PCLK_V(TIMER0,1))
//#endif
/* let BAT_RAM and SYSCON be at normal freq at  CCLK/4 */
//#ifndef PCLKSEL1_Val
//      #define PCLKSEL1_Val  (LPC2XXX_PCLK_V(BAT_RAM,4) | LPC2XXX_PCLK_V(SYSCON,4))
//#endif


#define LPC2xxx_FLASH_SETUP     1 /**< Enabling MAM*/
        /* Enabling MAM and setting number of clocks
        used for Flash memory fetch (4 cclks in this case) */
#define MAMCR_Val               LPC_SC_MAM_MODE_FULL


#define LPC2xxx_SDRAM_SETUP     BSP_BOARD_HAS_SDRAM
/*--------END OF VALUES FOR system_LPC2xxx   ---------------------------------*/
/*----------------------------------------------------------------------------*/
/* SPI CHIP SELECT CHIP NUMBRES */
#define CS_VS1002D      1

#define P0_20_TP_CS /* no need to chip select*/

#define port_spi_chip_select_init()     /* no need to chip select*/


//void port_spi_chip_select
#define port_spi_chip_select(chip_num)  /* no need to chip select*/


#define port_spi_chip_disselect(chip_num) /* no need to chip select*/

/*----------------------------------------------------------------------------*/

#endif /*BSP_BOARD_DEF_H*/