CMSIS2000  0.0.7
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startup_ARMCM0.s
См. документацию.
1 /**************************************************************************//**
2  * @file startup_ARMCM0.s
3  * @brief CMSIS Core Device Startup File for
4  * ARMCM0 Device Series
5  * @version V1.07
6  * @date 30. January 2012
7  *
8  * @note Version CodeSourcery Sourcery G++ Lite (with CS3)
9  * Copyright (C) 2012 ARM Limited. All rights reserved.
10  *
11  * @par
12  * ARM Limited (ARM) is supplying this software for use with Cortex-M
13  * processor based microcontrollers. This file can be freely distributed
14  * within development tools that are supporting such ARM based processors.
15  *
16  * @par
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
21  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  ******************************************************************************/
24 /*
25 //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
26 */
27 
28 
29 /*
30 // <h> Stack Configuration
31 // <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
32 // </h>
33 */
34 
35  .equ Stack_Size, 0x00000400
36  .section ".stack", "w"
37  .align 3
38  .globl __cs3_stack_mem
39  .globl __cs3_stack_size
40 __cs3_stack_mem:
41  .if Stack_Size
42  .space Stack_Size
43  .endif
44  .size __cs3_stack_mem, . - __cs3_stack_mem
45  .set __cs3_stack_size, . - __cs3_stack_mem
46 
47 
48 /*
49 // <h> Heap Configuration
50 // <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
51 // </h>
52 */
53 
54  .equ Heap_Size, 0x00000C00
55 
56  .section ".heap", "w"
57  .align 3
58  .globl __cs3_heap_start
59  .globl __cs3_heap_end
60 __cs3_heap_start:
61  .if Heap_Size
62  .space Heap_Size
63  .endif
64 __cs3_heap_end:
65 
66 
67 /* Vector Table */
68 
69  .section ".cs3.interrupt_vector"
70  .globl __cs3_interrupt_vector_cortex_m
71  .type __cs3_interrupt_vector_cortex_m, %object
72 
73 __cs3_interrupt_vector_cortex_m:
74  .long __cs3_stack /* Top of Stack */
75  .long __cs3_reset /* Reset Handler */
76  .long NMI_Handler /* NMI Handler */
77  .long HardFault_Handler /* Hard Fault Handler */
78  .long 0 /* Reserved */
79  .long 0 /* Reserved */
80  .long 0 /* Reserved */
81  .long 0 /* Reserved */
82  .long 0 /* Reserved */
83  .long 0 /* Reserved */
84  .long 0 /* Reserved */
85  .long SVC_Handler /* SVCall Handler */
86  .long 0 /* Reserved */
87  .long 0 /* Reserved */
88  .long PendSV_Handler /* PendSV Handler */
89  .long SysTick_Handler /* SysTick Handler */
90 
91  /* External Interrupts */
92  .long WDT_IRQHandler /* 0: Watchdog Timer */
93  .long RTC_IRQHandler /* 1: Real Time Clock */
94  .long TIM0_IRQHandler /* 2: Timer0 / Timer1 */
95  .long TIM2_IRQHandler /* 3: Timer2 / Timer3 */
96  .long MCIA_IRQHandler /* 4: MCIa */
97  .long MCIB_IRQHandler /* 5: MCIb */
98  .long UART0_IRQHandler /* 6: UART0 - DUT FPGA */
99  .long UART1_IRQHandler /* 7: UART1 - DUT FPGA */
100  .long UART2_IRQHandler /* 8: UART2 - DUT FPGA */
101  .long UART4_IRQHandler /* 9: UART4 - not connected */
102  .long AACI_IRQHandler /* 10: AACI / AC97 */
103  .long CLCD_IRQHandler /* 11: CLCD Combined Interrupt */
104  .long ENET_IRQHandler /* 12: Ethernet */
105  .long USBDC_IRQHandler /* 13: USB Device */
106  .long USBHC_IRQHandler /* 14: USB Host Controller */
107  .long CHLCD_IRQHandler /* 15: Character LCD */
108  .long FLEXRAY_IRQHandler /* 16: Flexray */
109  .long CAN_IRQHandler /* 17: CAN */
110  .long LIN_IRQHandler /* 18: LIN */
111  .long I2C_IRQHandler /* 19: I2C ADC/DAC */
112  .long 0 /* 20: Reserved */
113  .long 0 /* 21: Reserved */
114  .long 0 /* 22: Reserved */
115  .long 0 /* 23: Reserved */
116  .long 0 /* 24: Reserved */
117  .long 0 /* 25: Reserved */
118  .long 0 /* 26: Reserved */
119  .long 0 /* 27: Reserved */
120  .long CPU_CLCD_IRQHandler /* 28: Reserved - CPU FPGA CLCD */
121  .long 0 /* 29: Reserved - CPU FPGA */
122  .long UART3_IRQHandler /* 30: UART3 - CPU FPGA */
123  .long SPI_IRQHandler /* 31: SPI Touchscreen - CPU FPGA */
124 
125  .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m
126 
127 
128  .thumb
129 
130 
131 /* Reset Handler */
132 
133  .section .cs3.reset,"x",%progbits
134  .thumb_func
135  .globl __cs3_reset_cortex_m
136  .type __cs3_reset_cortex_m, %function
137 __cs3_reset_cortex_m:
138  .fnstart
139  LDR R0, =SystemInit
140  BLX R0
141  LDR R0,=_start
142  BX R0
143  .pool
144  .cantunwind
145  .fnend
146  .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m
147 
148  .section ".text"
149 
150 /* Exception Handlers */
151 
152  .weak NMI_Handler
153  .type NMI_Handler, %function
154 NMI_Handler:
155  B .
156  .size NMI_Handler, . - NMI_Handler
157 
158  .weak HardFault_Handler
159  .type HardFault_Handler, %function
160 HardFault_Handler:
161  B .
162  .size HardFault_Handler, . - HardFault_Handler
163 
164  .weak SVC_Handler
165  .type SVC_Handler, %function
166 SVC_Handler:
167  B .
168  .size SVC_Handler, . - SVC_Handler
169 
170  .weak PendSV_Handler
171  .type PendSV_Handler, %function
172 PendSV_Handler:
173  B .
174  .size PendSV_Handler, . - PendSV_Handler
175 
176  .weak SysTick_Handler
177  .type SysTick_Handler, %function
178 SysTick_Handler:
179  B .
180  .size SysTick_Handler, . - SysTick_Handler
181 
182 
183 /* IRQ Handlers */
184 
185  .globl Default_Handler
186  .type Default_Handler, %function
187 Default_Handler:
188  B .
189  .size Default_Handler, . - Default_Handler
190 
191  .macro def_irq_handler handler
192  .weak \handler
193  .set \handler, Default_Handler
194  .endm
195 
196  def_irq_handler WDT_IRQHandler
197  def_irq_handler RTC_IRQHandler
198  def_irq_handler TIM0_IRQHandler
199  def_irq_handler TIM2_IRQHandler
200  def_irq_handler MCIA_IRQHandler
201  def_irq_handler MCIB_IRQHandler
202  def_irq_handler UART0_IRQHandler
203  def_irq_handler UART1_IRQHandler
204  def_irq_handler UART2_IRQHandler
205  def_irq_handler UART3_IRQHandler
206  def_irq_handler UART4_IRQHandler
207  def_irq_handler AACI_IRQHandler
208  def_irq_handler CLCD_IRQHandler
209  def_irq_handler ENET_IRQHandler
210  def_irq_handler USBDC_IRQHandler
211  def_irq_handler USBHC_IRQHandler
212  def_irq_handler CHLCD_IRQHandler
213  def_irq_handler FLEXRAY_IRQHandler
214  def_irq_handler CAN_IRQHandler
215  def_irq_handler LIN_IRQHandler
216  def_irq_handler I2C_IRQHandler
217  def_irq_handler CPU_CLCD_IRQHandler
218  def_irq_handler SPI_IRQHandler
219 
220  .end