CMSIS2000  0.0.7
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interrupt_cortex.h
См. документацию.
1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 /** \file
33  *\if russian_lng
34  * Файл определяющий макросы прерываний и исключений
35  *\else
36  * This file is used to define exeptions and interrupt subroutines macroses for selected arch
37 
38  * \note need to insert iConfig.h or FreeRTOSConfig.h
39  *\endif
40  */
41 #ifndef _iARCH_CORTEX_INTERRUPT_H_
42 #define _iARCH_CORTEX_INTERRUPT_H_ 1
43 
44 #if defined ( __CC_ARM ) /*------------------ RealView Compiler ------------*/
45 /* ARM armcc specific functions */
46 __irq
47 /* neeed to do separate ISR asm file for inserting OS save/restore context code*/
48 /* :-(*/
49 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler -----------------*/
50 /* IAR iccarm specific functions */
51 
52 /* neeed to do separate ISR asm file for inserting OS save/restore context code*/
53 /* :-(*/
54 #define ISR_HANDLER_PROTO(name) \
55  void name (void)
56 
57 #elif (defined (__GNUC__)) /*------------------ GNU Compiler -----------------*/
58 /* GNU gcc specific functions */
59 #define ISR_HANDLER_PROTO(name) \
60  void name (void) __attribute__ ((section (".text.keep.vector")))
61 
62 #define ISR_HANDLER(name) void name (void)
63 //__attribute__ ((interrupt("IRQ")))
64 
65 #define FIQ_HANDLER_PROTO(name) \
66  void name (void) __attribute__ ((interrupt("FIQ")))
67 
68 #define FIQ_HANDLER(name) void name (void)
69 
70 #define UNDEF_HANDLER_PROTO(name) \
71  void name (void) __attribute__ ((interrupt("UNDEF")))
72 
73 #define SWI_HANDLER_PROTO(name) \
74  void name (void) __attribute__ ((interrupt("SWI")))
75 
76 #ifdef iSCHEDULER_TYPE /* --------------using iRTOS----------------*/
77 
78  #if (iSCHEDULER_TYPE == iPREEMPETIVE_SCHEDULER)
79 
80 
81  #endif
82 #endif
83 #ifdef configUSE_PREEMPTION /* --------------using freeRTOS----------------*/
84  #if (configUSE_PREEMPTION == 1)
85 
86  #define dri_make_asm_call_here(STRING) \
87  __asm volatile ("bl " #STRING)
88 
89  /* accoding to CMSIS function name is function_name##_IRQHandler*/
90  #define ISR_IRQ_OS_PROTO(function_name) \
91  void function_name##_IRQHandler ( void ) \
92  __attribute__ ((naked));\
93  void function_name##_IRQHandler_internal( void ) \
94  __attribute__ ((noinline)) \
95 
96  /* - Save the context of the interrupted task.
97  - Call the handler.
98  - Restore the context of whichever task is going to run next. */
99  #define ISR_IRQ_OS(function_name) \
100  void function_name##_IRQHandler ( void ) \
101  { \
102  portSAVE_CONTEXT(); \
103  dri_make_asm_call_here (function_name##_IRQHandler_internal) ; \
104  portRESTORE_CONTEXT(); \
105  } \
106  \
107  void function_name##_IRQHandler_internal( void )
108 
109 
110  #endif /* (configUSE_PREEMPTION == 1)*/
111 #endif /* (configUSE_PREEMPTION*/
112 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
113 /* TASKING carm specific functions */
114 #endif /* defined ( __CC_ARM ) */
115 
116 
117 
118 
119 
120 
121 
122 
123 
124 
125 
126 
127 /*- THE DEFAULT PROTOTYPING OF THIS HANDLERS WITHOUT ANY RTOS-----------------*/
128 #ifndef ISR_EXCEPTION_PROTOint
129  #define ISR_EXCEPTION_PROTOint(name) ISR_HANDLER_PROTO(name##_Handler)
130 #endif
131 #ifndef ISR_EXCEPTION_PROTO
132  #define ISR_EXCEPTION_PROTO(name) ISR_EXCEPTION_PROTOint(name)
133 #endif
134 #ifndef ISR_EXCEPTION
135  #define ISR_EXCEPTION(name) ISR_HANDLER(name##_Handler)
136 #endif
137 
138 #ifndef ISR_IRQ_PROTOint
139  #define ISR_IRQ_PROTOint(name) ISR_HANDLER_PROTO(name##_IRQHandler)
140 #endif
141 
142 #ifndef ISR_IRQ_PROTO
143  #define ISR_IRQ_PROTO(name) ISR_IRQ_PROTOint(name)
144 #endif
145 
146 #ifndef ISR_IRQint
147  #define ISR_IRQint(name) ISR_HANDLER(name##_IRQHandler)
148 #endif
149 
150 #ifndef ISR_IRQ
151  #define ISR_IRQ(name) ISR_IRQint(name)
152 #endif
153 
154 
155 
156 /*---here is the copy of upper level -----------------------------------------*/
157 
158 
159 
160 
161 #endif /* _iARCH_CORTEX_INTERRUPT_H_ */