CMSIS2000  0.0.7
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bsp_board_EA_v1_1.h
См. документацию.
1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 
33 #ifndef BSP_BOARD_DEF_H /*BSP_BOARD_DEF_H must be in every board_def file*/
34 #define BSP_BOARD_DEF_H 1
35 /**
36  * \defgroup xg_bsp_board_def_17xx_v1_1 LPC17xx board
37  * \ingroup xg_bsp_LPC17xx
38  * @{
39  *
40  *\~russian
41  * Описание платы EA_v1_1
42  *
43  * Плата EA_v1_1 -- отладочная плата от Embedded artist
44  *\~english
45  * EA_v1_1 board definition
46  *
47  * EA_v1_1 board is the Embedded artist board with
48  */
49 #ifndef bsp_board_EA_v1_1 /*bsp_board_brd_name must be in every board_def file*/
50  #define bsp_board_EA_v1_1 1
51 #endif
52 /*-----------i_ is the i_DENTIFICATION DEFENITIONS --------------------------*/
53 #define i_ARCH CM3
54 
55 #define i_MCU_FAMILY LPC17xx
56 
57 #define i_MCU_MODEL 1768
58 
59 #define i_BOARD EA_v1_1
60 
61 #define i_VENDOR EA
62 
63 #define i_VERSION 0x010100
64 /*---------DEFINES THAT PERIPHERIAL DEVICES BOARD HAS ------------------------*/
65 #define BSP_BOARD_HAS_ETHERNET 1 /**< board has ETHERNET*/
66 #define BSP_BOARD_HAS_UART0 1 /**< board has UART0*/
67 #define BSP_BOARD_HAS_UART1 1 /**< board has UART1*/
68 #define BSP_BOARD_HAS_UART2 1 /**< board has UART3 as IRDA */
69 #define BSP_BOARD_HAS_CAN 1 /**< board has CAN as IRDA */
70 #define BSP_BOARD_HAS_USB 1 /**< board has USB */
71 #define BSP_BOARD_HAS_USB_HOST 2 /**< board has USB HOST on USB2*/
72 #define BSP_BOARD_HAS_USB_OTG 1 /**< board has OTG USB on USB1*/
73 #define BSP_BOARD_HAS_USB_DEVICE 1 /**< board has USB DEVICE on USB1*/
74 
75 #define BSP_BOARD_HAS_SD 1
76 #define BSP_BOARD_HAS_MMC 1
77 
78 #define BSP_BOARD_HAS_I2C 1
79 #define BSP_BOARD_HAS_I2C_PCA9532 1
80 
81 #define BSP_BOARD_HAS_SPI 1
82 #define BSP_BOARD_HAS_SPI_TSC2046 1
83 
84 /*--------VALUES FOR system_LPC2xxx ----------------------------------------*/
85 #define LPC2xxx_VIC_SETUP 1
86 #define LPC2xxx_CLOCK_SETUP 1
87 #define LPC2xxx_PLL_SETUP 1
88 
89 #define XTAL_HZ 12000000UL
90  /* there is three clock soursec in lpc2xxx
91  and table here describe sourses and frequency constants.
92  CLKSRCSEL_IRC 0 IRC_OSC_HZ
93  CLKSRCSEL_XTAL 1 XTAL_HZ
94  CLKSRCSEL_RTC 2 RTC_CLK_HZ
95  */
96  /* select extermal oscillator, as the PLL clock source */
97 #define CLKSRCSEL_Val CLKSRCSEL_XTAL
98 
99 /* Fcck = 72Mhz, Fosc = 288Mhz, and USB 48Mhz */
100 /*Fcck = 2 * (PLL_MValue + 1) * F_OSC_HZ)/(PLL_NValue + 1) /(CCLKCFG_Val + 1))
101  Fcck = 2 * 12 * 12 = 288Mhz
102  Fosc = Fcck / (CCLKCFG_Val + 1) = 57.6Mhz --> useful for UART 57600 baud and etc.
103  FUSB = Fcck / (USBCLKDivValue + 1) = 48Mhz
104 */
105 #define PLL_MValue 11
106 #define PLL_NValue 0
107 #define CCLKCFG_Val 3
108 #define USBCLKCFG_Val 5
109 /* example 2 the best by perfomance and CCLK clock is max
110  Fcck = 2 * 12 * 12 = 288Mhz
111  Fosc = Fcck / (3 + 1) = 72.0Mhz
112  FUSB = Fcck / (9 + 1) = 48.0Mhz
113 
114 #define PLL_MValue 11
115 #define PLL_NValue 0
116 #define CCLKCFG_Val 3
117 #define USBCLKDivValue 5
118 */
119 /* example 3
120  Fcck = 2 * 20 * 12 = 480Mhz
121  Fosc = Fcck / (7 + 1) = 60.0Mhz
122  FUSB = Fcck / (9 + 1) = 48.0Mhz
123 
124 #define PLL_MValue 19
125 #define PLL_NValue 0
126 #define CCLKCFG_Val 7
127 #define USBCLKDivValue 9
128 */
129 
130 /*-----------Peripheral clock selsection -------------------------------------*/
131 /* let watchdog be at normal freq at CCLK/4 but let timer be at CCLK/1 */
132 #ifndef PCLKSEL0_Val
133  #define PCLKSEL0_Val (LPC2XXX_PCLK_V(WDT,4) | LPC2XXX_PCLK_V(TIMER0,1))
134 #endif
135 /* let BAT_RAM and SYSCON be at normal freq at CCLK/4 */
136 #ifndef PCLKSEL1_Val
137  #define PCLKSEL1_Val (LPC2XXX_PCLK_V(BAT_RAM,4) | LPC2XXX_PCLK_V(SYSCON,4))
138 #endif
139 
140 #ifndef PCONP_Val
141  #define PCONP_Val (PCTIMER0 | PCTIMER1 | PCUART0 | PCUART1 | \
142  PCPWM1 | PCI2C0 | PCSPI | PCRTC | PCSSP1 | PCGPIO | PCI2C1 \
143  PCTIM3 | PCI2C1 | PCUART3 | PCENET)
144 #endif
145 
146 
147 
148 #define LPC2xxx_FLASH_SETUP 1 /**< Enabling MAM*/
149  /* Enabling MAM and setting number of clocks
150  used for Flash memory fetch (4 cclks in this case) */
151 #define MAMCR_Val LPC_SC_MAM_MODE_FULL
152 
153 
154 #define LPC2xxx_SDRAM_SETUP BSP_BOARD_HAS_SDRAM
155 /*--------END OF VALUES FOR system_LPC2xxx ---------------------------------*/
156 /*--------PIN DESCRIPTION ----------------------------------------------------*/
157 /*--------END OF PIN DESCRIPTION ---------------------------------------------*/
158 /*-------SPI CHIP SELECT CHIP NUMBRES ---------------------------------------*/
159 #define CS_TSC2046 1
160 
161 #define P0_20_TP_CS PORT_PIN_NUMBER(LPC2XXX_PORT0,20)
162 
163 #define port_spi_chip_select_init() \
164  PORT_SELECT_PIN (P0_20_TP_CS,PORT_PIN_MODE_GPIO); \
165  PORT_DIRECTION_PIN(P0_20_TP_CS,PIN_OUTPUT); \
166  PORT_SET_PIN (P0_20_TP_CS)
167 
168 
169 //void port_spi_chip_select
170 #define port_spi_chip_select(chip_num) \
171  PORT_CLEAR_PIN (P0_20_TP_CS)
172 
173 
174 #define port_spi_chip_disselect(chip_num) \
175  PORT_SET_PIN (P0_20_TP_CS)
176 
177 /*----------------------------------------------------------------------------*/
178 #define PCA_LED1 8
179 #define PCA_LED2 9
180 #define PCA_LED3 10
181 #define PCA_LED4 11
182 #define PCA_LED5 12
183 #define PCA_LED6 14
184 #define PCA_LED7 15
185 
186 #define PCA_LEDnWP 4
187 #define PCA_LEDCD 5
188 
189 /** @} end of group xg_bsp_board_def_EA_v1_1 */
190 #endif /*BSP_BOARD_DEF_H*/