CMSIS2000  0.0.7
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startup_ARMSC000.s
См. документацию.
1 ;/**************************************************************************//**
2 ; * @file startup_ARMSC000.s
3 ; * @brief CMSIS Core Device Startup File for
4 ; * for ARMSC000 Device Series
5 ; * @version V1.07
6 ; * @date 30. January 2012
7 ; *
8 ; * @note
9 ; * Copyright (C) 2012 ARM Limited. All rights reserved.
10 ; *
11 ; * @par
12 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M
13 ; * processor based microcontrollers. This file can be freely distributed
14 ; * within development tools that are supporting such ARM based processors.
15 ; *
16 ; * @par
17 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
21 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 ; *
23 ; ******************************************************************************/
24 
25 
26 ;
27 ; The modules in this file are included in the libraries, and may be replaced
28 ; by any user-defined modules that define the PUBLIC symbol _program_start or
29 ; a user defined start symbol.
30 ; To override the cstartup defined in the library, simply add your modified
31 ; version to the workbench project.
32 ;
33 ; The vector table is normally located at address 0.
34 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
35 ; The name "__vector_table" has special meaning for C-SPY:
36 ; it is where the SP start value is found, and the NVIC vector
37 ; table register (VTOR) is initialized to this address if != 0.
38 ;
39 ; Cortex-M version
40 ;
41 
42  MODULE ?cstartup
43 
44  ;; Forward declaration of sections.
45  SECTION CSTACK:DATA:NOROOT(3)
46 
47  SECTION .intvec:CODE:NOROOT(2)
48 
49  EXTERN __iar_program_start
50  EXTERN SystemInit
51  PUBLIC __vector_table
52  PUBLIC __vector_table_0x1c
53  PUBLIC __Vectors
54  PUBLIC __Vectors_End
55  PUBLIC __Vectors_Size
56 
57  DATA
58 
59 __vector_table
60  DCD sfe(CSTACK)
61  DCD Reset_Handler
62 
63  DCD NMI_Handler
64  DCD HardFault_Handler
65  DCD 0
66  DCD 0
67  DCD 0
68 __vector_table_0x1c
69  DCD 0
70  DCD 0
71  DCD 0
72  DCD 0
73  DCD SVC_Handler
74  DCD 0
75  DCD 0
76  DCD PendSV_Handler
77  DCD SysTick_Handler
78 
79  ; External Interrupts
80  DCD WDT_IRQHandler ; 0: Watchdog Timer
81  DCD RTC_IRQHandler ; 1: Real Time Clock
82  DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
83  DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
84  DCD MCIA_IRQHandler ; 4: MCIa
85  DCD MCIB_IRQHandler ; 5: MCIb
86  DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
87  DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
88  DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
89  DCD UART4_IRQHandler ; 9: UART4 - not connected
90  DCD AACI_IRQHandler ; 10: AACI / AC97
91  DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
92  DCD ENET_IRQHandler ; 12: Ethernet
93  DCD USBDC_IRQHandler ; 13: USB Device
94  DCD USBHC_IRQHandler ; 14: USB Host Controller
95  DCD CHLCD_IRQHandler ; 15: Character LCD
96  DCD FLEXRAY_IRQHandler ; 16: Flexray
97  DCD CAN_IRQHandler ; 17: CAN
98  DCD LIN_IRQHandler ; 18: LIN
99  DCD I2C_IRQHandler ; 19: I2C ADC/DAC
100  DCD 0 ; 20: Reserved
101  DCD 0 ; 21: Reserved
102  DCD 0 ; 22: Reserved
103  DCD 0 ; 23: Reserved
104  DCD 0 ; 24: Reserved
105  DCD 0 ; 25: Reserved
106  DCD 0 ; 26: Reserved
107  DCD 0 ; 27: Reserved
108  DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
109  DCD 0 ; 29: Reserved - CPU FPGA
110  DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
111  DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
112 __Vectors_End
113 
114 __Vectors EQU __vector_table
115 __Vectors_Size EQU __Vectors_End - __Vectors
116 
117 
118 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
119 ;;
120 ;; Default interrupt handlers.
121 ;;
122  THUMB
123 
124  PUBWEAK Reset_Handler
125  SECTION .text:CODE:REORDER(2)
126 Reset_Handler
127  LDR R0, =SystemInit
128  BLX R0
129  LDR R0, =__iar_program_start
130  BX R0
131 
132  PUBWEAK NMI_Handler
133  SECTION .text:CODE:REORDER(1)
134 NMI_Handler
135  B NMI_Handler
136 
137  PUBWEAK HardFault_Handler
138  SECTION .text:CODE:REORDER(1)
139 HardFault_Handler
140  B HardFault_Handler
141  PUBWEAK SVC_Handler
142  SECTION .text:CODE:REORDER(1)
143 SVC_Handler
144  B SVC_Handler
145  PUBWEAK PendSV_Handler
146  SECTION .text:CODE:REORDER(1)
147 PendSV_Handler
148  B PendSV_Handler
149 
150  PUBWEAK SysTick_Handler
151  SECTION .text:CODE:REORDER(1)
152 SysTick_Handler
153  B SysTick_Handler
154 
155  PUBWEAK WDT_IRQHandler
156  SECTION .text:CODE:REORDER(1)
157 WDT_IRQHandler
158  B WDT_IRQHandler
159 
160  PUBWEAK RTC_IRQHandler
161  SECTION .text:CODE:REORDER(1)
162 RTC_IRQHandler
163  B RTC_IRQHandler
164 
165  PUBWEAK TIM0_IRQHandler
166  SECTION .text:CODE:REORDER(1)
167 TIM0_IRQHandler
168  B TIM0_IRQHandler
169 
170  PUBWEAK TIM2_IRQHandler
171  SECTION .text:CODE:REORDER(1)
172 TIM2_IRQHandler
173  B TIM2_IRQHandler
174 
175  PUBWEAK MCIA_IRQHandler
176  SECTION .text:CODE:REORDER(1)
177 MCIA_IRQHandler
178  B MCIA_IRQHandler
179 
180  PUBWEAK MCIB_IRQHandler
181  SECTION .text:CODE:REORDER(1)
182 MCIB_IRQHandler
183  B MCIB_IRQHandler
184 
185  PUBWEAK UART0_IRQHandler
186  SECTION .text:CODE:REORDER(1)
187 UART0_IRQHandler
188  B UART0_IRQHandler
189 
190  PUBWEAK UART1_IRQHandler
191  SECTION .text:CODE:REORDER(1)
192 UART1_IRQHandler
193  B UART1_IRQHandler
194 
195  PUBWEAK UART2_IRQHandler
196  SECTION .text:CODE:REORDER(1)
197 UART2_IRQHandler
198  B UART2_IRQHandler
199 
200  PUBWEAK UART4_IRQHandler
201  SECTION .text:CODE:REORDER(1)
202 UART4_IRQHandler
203  B UART4_IRQHandler
204 
205  PUBWEAK AACI_IRQHandler
206  SECTION .text:CODE:REORDER(1)
207 AACI_IRQHandler
208  B AACI_IRQHandler
209 
210  PUBWEAK CLCD_IRQHandler
211  SECTION .text:CODE:REORDER(1)
212 CLCD_IRQHandler
213  B CLCD_IRQHandler
214 
215  PUBWEAK ENET_IRQHandler
216  SECTION .text:CODE:REORDER(1)
217 ENET_IRQHandler
218  B ENET_IRQHandler
219 
220  PUBWEAK USBDC_IRQHandler
221  SECTION .text:CODE:REORDER(1)
222 USBDC_IRQHandler
223  B USBDC_IRQHandler
224 
225  PUBWEAK USBHC_IRQHandler
226  SECTION .text:CODE:REORDER(1)
227 USBHC_IRQHandler
228  B USBHC_IRQHandler
229 
230  PUBWEAK CHLCD_IRQHandler
231  SECTION .text:CODE:REORDER(1)
232 CHLCD_IRQHandler
233  B CHLCD_IRQHandler
234 
235  PUBWEAK FLEXRAY_IRQHandler
236  SECTION .text:CODE:REORDER(1)
237 FLEXRAY_IRQHandler
238  B FLEXRAY_IRQHandler
239 
240  PUBWEAK CAN_IRQHandler
241  SECTION .text:CODE:REORDER(1)
242 CAN_IRQHandler
243  B CAN_IRQHandler
244 
245  PUBWEAK LIN_IRQHandler
246  SECTION .text:CODE:REORDER(1)
247 LIN_IRQHandler
248  B LIN_IRQHandler
249 
250  PUBWEAK I2C_IRQHandler
251  SECTION .text:CODE:REORDER(1)
252 I2C_IRQHandler
253  B I2C_IRQHandler
254 
255  PUBWEAK CPU_CLCD_IRQHandler
256  SECTION .text:CODE:REORDER(1)
257 CPU_CLCD_IRQHandler
258  B CPU_CLCD_IRQHandler
259 
260  PUBWEAK UART3_IRQHandler
261  SECTION .text:CODE:REORDER(1)
262 UART3_IRQHandler
263  B UART3_IRQHandler
264 
265  PUBWEAK SPI_IRQHandler
266  SECTION .text:CODE:REORDER(1)
267 SPI_IRQHandler
268  B SPI_IRQHandler
269 
270  END