CMSIS2000  0.0.7
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Here is a list of all modules:
[detail level 1234]
oSources from NXP
|\Examples from NXP
| \DAC_Examples
oiArch platform independent macroses.Macroses and some documentation presented for different CPU and MCU
|oGeneric empty PORTArchitecture dependent OS API description only implemented
|oPOSIXPOSIX port documentation
|oWINNTWINDOWS port documentation
|oAVR RISC CPUAVR core port documentation
|oARM RISC CPU (ARM7)ARM7 core port documentation
||oLPC2xxx family (NXP)LPC2xxx from NXP(Philips) family port documentation
||\Atmel ARM7 RISC CPUs (ARM7)Atmel..
|\Interrupt macrosesArch independent interrupt and exceptions handlers declaration and creation
oBoard specific support packages (BSP)There is must be three defines in project i_ARCH, i_MCU_FAMILY, i_MCU_MODEL
|oBoards for MCU LPC2xxx series(BSP)
||oEmbedded Artist LPC2478 boardEA_v1_1 board definition
||\LPC2xxx generic boardLPC2xxx generic board definition
|oBoards for MCU LPC17xx series(BSP)
||oLPC17xx boardEA_v1_1 board definition
||oLPC17xx generic boardLPC17xx generic board definition
||oOlimex LPC1766-STK boardLPC1766-STK board definition
||\Starterkit SK-MLPC1768 boardSK-MLPC1768 board definition
|\Boards for AVR RISC 8bit series(BSP)
| \AVR generic boardAVR generic board definition
oCMSIS original documentation
|oCMSIS DSP Software Library Fucntions
||oBasic Math Functions
||oFast Math FunctionsThis set of functions provides a fast approximation to sine, cosine, and square root
|||\Square RootComputes the square root of a number
||oComplex Math FunctionsThis set of functions operates on complex data vectors
||oFiltering Functions
||oMatrix FunctionsThis set of functions provides basic matrix math operations
||oTransform Functions
||oController Functions
|||oPID Motor ControlA Proportional Integral Derivative (PID) controller is a generic feedback control loop mechanism widely used in industrial control systems
|||oVector Clarke TransformForward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector
|||oVector Inverse Clarke TransformInverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases
|||oVector Park TransformForward Park transform converts the input two-coordinate vector to flux and torque components
|||\Vector Inverse Park transformInverse Park transform converts the input flux and torque components to two-coordinate vector
||oStatistics Functions
||oSupport Functions
||oInterpolation FunctionsThese functions perform 1- and 2-dimensional interpolation of data
|||oLinear InterpolationLinear interpolation is a method of curve fitting using linear polynomials
|||\Bilinear InterpolationBilinear interpolation is an extension of linear interpolation applied to a two dimensional grid
|oCMSIS Core Lint ConfigurationList of Lint messages which will be suppressed and not shown:
|oCMSIS SIMD IntrinsicsAccess to dedicated SIMD instructions
|oCMSIS Core Instruction InterfaceAccess to dedicated instructions
|oCMSIS Global DefinesIO Type Qualifiers are used
|oDefines and Type DefinitionsType definitions and defines for Cortex-M processor based devices
||oStatus and Control RegistersCore Register type definitions
||oNested Vectored Interrupt Controller (NVIC)Type definitions for the NVIC Registers
||oSystem Control Block (SCB)Type definitions for the System Control Block Registers
||oSystem Tick Timer (SysTick)Type definitions for the System Timer Registers
||oCore Debug Registers (CoreDebug)Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor
||oCore DefinitionsDefinitions for base addresses, unions, and structures
||oSystem Controls not in SCB (SCnSCB)Type definitions for the System Control and ID Register not in the SCB
||oInstrumentation Trace Macrocell (ITM)Type definitions for the Instrumentation Trace Macrocell (ITM)
||oData Watchpoint and Trace (DWT)Type definitions for the Data Watchpoint and Trace (DWT)
||\Trace Port Interface (TPI)Type definitions for the Trace Port Interface (TPI)
|\Functions and Instructions Reference
| oCMSIS Core Register Access Functions
| oNVIC FunctionsFunctions that manage interrupts and exceptions via the NVIC
| oSysTick FunctionsFunctions that configure the System
| \ITM FunctionsFunctions that access the ITM debug interface
oNeed to be done.
|oLPC17xx System Defines
|oLPC17xx System Public Variables
|\LPC17xx System Public Functions
oLPC2xxx System
|oAPB(ARM Peripheral Bus) peripheries registers addresses
|oLPC2xxx System etc periphiralsNXP PLCK divider NXP PCLK Peripheral Clock devider -> PLCK divider (VPB bus clock dividers) Bit1 Bit0 Description 0 0 cclk/4 (1/4 From CPU CLOCK) 0 1 cclk/1 (No division) 1 0 cclk/2 (1/2 From CPU CLOCK) 1 1 cclk/6 or cclk/8
|oCMSIS Core Definitions for LPC2xxxThis file defines all structures and symbols for CMSIS core:
|oLPC2xxx IRQ Numbers
|\APB(ARM Peripheral Bus) peripheries base addresses
oOLD Sources from NXP
|\APB(ARM Peripheral Bus) peripheries registers addresses