CMSIS2000  0.0.7
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APB(ARM Peripheral Bus) peripheries registers addresses
Collaboration diagram for APB(ARM Peripheral Bus) peripheries registers addresses:

Data Structures

struct  LPC_ADC_TypeDef
 Analog-to-Digital Converter (ADC) register structure definition. More...
struct  LPC_CAN_TypeDef
 Controller Area Network Controller (CAN) register structure definition. More...
struct  LPC_CANAF_RAM_TypeDef
 Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...
struct  LPC_CANAF_TypeDef
 Controller Area Network Acceptance Filter(CANAF) register structure definition. More...
struct  LPC_CANCR_TypeDef
 Controller Area Network Central (CANCR) register structure definition. More...
struct  LPC_DAC_TypeDef
 Digital-to-Analog Converter (DAC) register structure definition. More...
struct  LPC_GPDMA_TypeDef
 General Purpose Direct Memory Access (GPDMA) register structure definition. More...
struct  LPC_GPDMACH_TypeDef
 General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...
struct  LPC_GPIO_TypeDef
 General Purpose Input/Output (GPIO) register structure definition. More...
struct  LPC_GPIOINT_TypeDef
 General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...
struct  LPC_I2C_TypeDef
 Inter-Integrated Circuit (I2C) register structure definition. More...
struct  LPC_I2S_TypeDef
 Inter IC Sound (I2S) register structure definition. More...
struct  LPC_IO_TypeDef_old
 General Purpose Input/Output (GPIO) register structure definition old pins style control. More...
struct  LPC_MCI_TypeDef
 MultiMedia Card Interface(MCI) Controller register structure definition. More...
struct  LPC_PINCON_TypeDef
 Pin Connect Block (PINCON) register structure definition. More...
struct  LPC_PWM_TypeDef
 Pulse-Width Modulation (PWM) register structure definition. More...
struct  LPC_RTC_TypeDef
 Real-Time Clock (RTC) register structure definition. More...
struct  LPC_SC_TypeDef
 System Control (SC) register structure definition. More...
struct  LPC_SPI_TypeDef
 Serial Peripheral Interface (SPI) register structure definition. More...
struct  LPC_SSP_TypeDef
 Synchronous Serial Communication (SSP) register structure definition. More...
struct  LPC_TIM_TypeDef
 Timer (TIM) register structure definition. More...
struct  LPC_UART1_TypeDef
 Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...
struct  LPC_UART_TypeDef
 Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...
struct  LPC_USB_TypeDef
 Universal Serial Bus (USB) register structure definition. More...
struct  LPC_WDT_TypeDef
 Watchdog Timer (WDT) register structure definition. More...
struct  VIC_TypeDef

Macros

#define LPC_ADC   ((LPC_ADC_TypeDef *) LPC_AD0_BASE )
#define LPC_CAN1   ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
#define LPC_CAN2   ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
#define LPC_CANAF   ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
#define LPC_CANAF_RAM   ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
#define LPC_CANCR   ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
#define LPC_DAC   ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
#define LPC_GPIO0   ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define LPC_GPIO1   ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define LPC_GPIO2   ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define LPC_GPIO3   ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#define LPC_GPIO4   ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
#define LPC_GPIOINT   ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
#define LPC_I2C0   ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
#define LPC_I2C1   ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
#define LPC_I2C2   ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
#define LPC_IO   ((LPC_IO_TypeDef_old *) LPC_GPIO_BASE )
#define LPC_IO0   ((LPC_IO_TypeDef_old *) LPC_GPIO_BASE )
#define LPC_IO1   ((LPC_IO_TypeDef_old *) LPC_GPIO_BASE + 0x10)
#define LPC_MCPWM   ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
#define LPC_PINCON   ((LPC_PINCON_TypeDef *) LPC_PINSEL_BASE )
#define LPC_PWM0   ((LPC_PWM_TypeDef *) LPC_PWM0_BASE )
#define LPC_PWM1   ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
#define LPC_QEI   ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
#define LPC_RIT   ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
#define LPC_RTC   ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
#define LPC_SC   ((LPC_SC_TypeDef *) LPC_SC_BASE )
#define LPC_SC_MAM_MODE_DISABLED   0
#define LPC_SC_MAM_MODE_FULL   2
#define LPC_SC_MAM_MODE_PARTIAL   1
#define LPC_SC_PLLCFG_NSEL_Pos   5
#define LPC_SC_PLLSTAT_PLLC_Pos   (LPC_SC_PLLSTAT_PLLE_Pos + 1)
#define LPC_SC_PLLSTAT_PLLE_Pos   8
#define LPC_SC_PLLSTAT_PLOCK_Pos   (LPC_SC_PLLSTAT_PLLE_Pos + 2)
#define LPC_SPI   ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
#define LPC_SSP0   ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
#define LPC_SSP1   ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
#define LPC_TIM0   ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
#define LPC_TIM1   ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
#define LPC_TIM2   ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
#define LPC_TIM3   ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
#define LPC_UART0   ((LPC_UART_TypeDef *) LPC_UART0_BASE )
#define LPC_UART1   ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
#define LPC_UART2   ((LPC_UART_TypeDef *) LPC_UART2_BASE )
#define LPC_UART3   ((LPC_UART_TypeDef *) LPC_UART3_BASE )
#define LPC_WDT   ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define PLLCFG_Val   (PLL_MValue | (PLL_NValue << 5))
#define PWMCR_ENABLE_Msk   (1 << 0)
#define PWMCR_RESET_Msk   (1 << 1)
#define PWMIR_MR0I_Msk   (1 << 0)
#define PWMIR_MR1I_Msk   (1 << 1)
#define PWMIR_MR2I_Msk   (1 << 2)
#define PWMIR_MR3I_Msk   (1 << 3)
#define PWMIR_MR4I_Msk   (1 << 8)
#define PWMIR_MR5I_Msk   (1 << 9)
#define PWMIR_MR6I_Msk   (1 << 10)
#define PWMIR_Msk   (0x070F)
#define TCCR_CR0_F_Msk   (1 << 1)
#define TCCR_CR0_I_Msk   (1 << 2)
#define TCCR_CR0_R_Msk   (1 << 0)
#define TCCR_CR1_F_Msk   (1 << 4)
#define TCCR_CR1_I_Msk   (1 << 5)
#define TCCR_CR1_R_Msk   (1 << 3)
#define TCCR_CR2_F_Msk   (1 << 7)
#define TCCR_CR2_I_Msk   (1 << 8)
#define TCCR_CR2_R_Msk   (1 << 6)
#define TCCR_CR3_F_Msk   (1 << 10)
#define TCCR_CR3_I_Msk   (1 << 11)
#define TCCR_CR3_R_Msk   (1 << 9)
#define TCR_ENABLE_Msk   (1 << 0)
#define TCR_RESET_Msk   (1 << 1)
#define TIR_CR0I_Msk   (1 << 4)
#define TIR_CR1I_Msk   (1 << 5)
#define TIR_CR2I_Msk   (1 << 6)
#define TIR_CR3I_Msk   (1 << 7)
#define TIR_MR0I_Msk   (1 << 0)
#define TIR_MR1I_Msk   (1 << 1)
#define TIR_MR2I_Msk   (1 << 2)
#define TIR_MR3I_Msk   (1 << 3)
#define TMCR_MR0_I_Msk   (1 << 0)
#define TMCR_MR0_R_Msk   (1 << 1)
#define TMCR_MR0_S_Msk   (1 << 2)
#define TMCR_MR1_I_Msk   (1 << 3)
#define TMCR_MR1_R_Msk   (1 << 4)
#define TMCR_MR1_S_Msk   (1 << 5)
#define TMCR_MR2_I_Msk   (1 << 6)
#define TMCR_MR2_R_Msk   (1 << 7)
#define TMCR_MR2_S_Msk   (1 << 8)
#define TMCR_MR3_I_Msk   (1 << 9)
#define TMCR_MR3_R_Msk   (1 << 10)
#define TMCR_MR3_S_Msk   (1 << 11)
#define VIC   ((VIC_TypeDef *) VIC_BASE )
#define VIC_MAX_IRQ_NUMBER   (VIC_SIZE-1)
#define VIC_SIZE   16

Detailed Description

Macro Definition Documentation

#define LPC_ADC   ((LPC_ADC_TypeDef *) LPC_AD0_BASE )

Definition at line 1756 of file LPC2xxx.h.

#define LPC_CAN1   ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )

Definition at line 1761 of file LPC2xxx.h.

#define LPC_CAN2   ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )

Definition at line 1762 of file LPC2xxx.h.

#define LPC_CANAF   ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )

Definition at line 1759 of file LPC2xxx.h.

#define LPC_CANAF_RAM   ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)

Definition at line 1758 of file LPC2xxx.h.

#define LPC_CANCR   ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )

Definition at line 1760 of file LPC2xxx.h.

#define LPC_DAC   ((LPC_DAC_TypeDef *) LPC_DAC_BASE )

Definition at line 1757 of file LPC2xxx.h.

#define LPC_GPIO0   ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )

Definition at line 1729 of file LPC2xxx.h.

#define LPC_GPIO1   ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )

Definition at line 1730 of file LPC2xxx.h.

#define LPC_GPIO2   ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )

Definition at line 1731 of file LPC2xxx.h.

#define LPC_GPIO3   ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )

Definition at line 1732 of file LPC2xxx.h.

#define LPC_GPIO4   ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )

Definition at line 1733 of file LPC2xxx.h.

#define LPC_GPIOINT   ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )

Definition at line 1752 of file LPC2xxx.h.

#define LPC_I2C0   ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )

Definition at line 1746 of file LPC2xxx.h.

#define LPC_I2C1   ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )

Definition at line 1747 of file LPC2xxx.h.

#define LPC_I2C2   ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )

Definition at line 1748 of file LPC2xxx.h.

#define LPC_IO   ((LPC_IO_TypeDef_old *) LPC_GPIO_BASE )

Definition at line 1725 of file LPC2xxx.h.

#define LPC_IO0   ((LPC_IO_TypeDef_old *) LPC_GPIO_BASE )

Definition at line 1726 of file LPC2xxx.h.

#define LPC_IO1   ((LPC_IO_TypeDef_old *) LPC_GPIO_BASE + 0x10)

Definition at line 1727 of file LPC2xxx.h.

#define LPC_MCPWM   ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )

Definition at line 1763 of file LPC2xxx.h.

#define LPC_PINCON   ((LPC_PINCON_TypeDef *) LPC_PINSEL_BASE )

Definition at line 1753 of file LPC2xxx.h.

#define LPC_PWM0   ((LPC_PWM_TypeDef *) LPC_PWM0_BASE )

Definition at line 1744 of file LPC2xxx.h.

#define LPC_PWM1   ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )

Definition at line 1745 of file LPC2xxx.h.

#define LPC_QEI   ((LPC_QEI_TypeDef *) LPC_QEI_BASE )

Definition at line 1764 of file LPC2xxx.h.

#define LPC_RIT   ((LPC_RIT_TypeDef *) LPC_RIT_BASE )

Definition at line 1739 of file LPC2xxx.h.

#define LPC_RTC   ((LPC_RTC_TypeDef *) LPC_RTC_BASE )

Definition at line 1751 of file LPC2xxx.h.

#define LPC_SC   ((LPC_SC_TypeDef *) LPC_SC_BASE )

Definition at line 1723 of file LPC2xxx.h.

#define LPC_SC_MAM_MODE_DISABLED   0

Definition at line 282 of file LPC2xxx.h.

#define LPC_SC_MAM_MODE_FULL   2

Definition at line 284 of file LPC2xxx.h.

#define LPC_SC_MAM_MODE_PARTIAL   1

Definition at line 283 of file LPC2xxx.h.

#define LPC_SC_PLLCFG_NSEL_Pos   5

Definition at line 275 of file LPC2xxx.h.

#define LPC_SC_PLLSTAT_PLLC_Pos   (LPC_SC_PLLSTAT_PLLE_Pos + 1)

Definition at line 279 of file LPC2xxx.h.

#define LPC_SC_PLLSTAT_PLLE_Pos   8

LPC_SC PLLSTAT: PLLE Position

Definition at line 276 of file LPC2xxx.h.

#define LPC_SC_PLLSTAT_PLOCK_Pos   (LPC_SC_PLLSTAT_PLLE_Pos + 2)

Definition at line 280 of file LPC2xxx.h.

#define LPC_SPI   ((LPC_SPI_TypeDef *) LPC_SPI_BASE )

Definition at line 1750 of file LPC2xxx.h.

#define LPC_SSP0   ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )

Definition at line 1754 of file LPC2xxx.h.

#define LPC_SSP1   ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )

Definition at line 1755 of file LPC2xxx.h.

#define LPC_TIM0   ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )

Definition at line 1735 of file LPC2xxx.h.

#define LPC_TIM1   ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )

Definition at line 1736 of file LPC2xxx.h.

#define LPC_TIM2   ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )

Definition at line 1737 of file LPC2xxx.h.

#define LPC_TIM3   ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )

Definition at line 1738 of file LPC2xxx.h.

#define LPC_UART0   ((LPC_UART_TypeDef *) LPC_UART0_BASE )

Definition at line 1740 of file LPC2xxx.h.

#define LPC_UART1   ((LPC_UART1_TypeDef *) LPC_UART1_BASE )

Definition at line 1741 of file LPC2xxx.h.

#define LPC_UART2   ((LPC_UART_TypeDef *) LPC_UART2_BASE )

Definition at line 1742 of file LPC2xxx.h.

#define LPC_UART3   ((LPC_UART_TypeDef *) LPC_UART3_BASE )

Definition at line 1743 of file LPC2xxx.h.

#define LPC_WDT   ((LPC_WDT_TypeDef *) LPC_WDT_BASE )

Definition at line 1734 of file LPC2xxx.h.

#define PLLCFG_Val   (PLL_MValue | (PLL_NValue << 5))

Definition at line 277 of file LPC2xxx.h.

#define PWMCR_ENABLE_Msk   (1 << 0)

Definition at line 364 of file LPC2xxx.h.

#define PWMCR_RESET_Msk   (1 << 1)

Definition at line 365 of file LPC2xxx.h.

#define PWMIR_MR0I_Msk   (1 << 0)

Definition at line 299 of file LPC2xxx.h.

#define PWMIR_MR1I_Msk   (1 << 1)

Definition at line 300 of file LPC2xxx.h.

#define PWMIR_MR2I_Msk   (1 << 2)

Definition at line 301 of file LPC2xxx.h.

#define PWMIR_MR3I_Msk   (1 << 3)

Definition at line 302 of file LPC2xxx.h.

#define PWMIR_MR4I_Msk   (1 << 8)

Definition at line 303 of file LPC2xxx.h.

#define PWMIR_MR5I_Msk   (1 << 9)

Definition at line 304 of file LPC2xxx.h.

#define PWMIR_MR6I_Msk   (1 << 10)

Definition at line 305 of file LPC2xxx.h.

#define PWMIR_Msk   (0x070F)

Definition at line 306 of file LPC2xxx.h.

#define TCCR_CR0_F_Msk   (1 << 1)

Definition at line 328 of file LPC2xxx.h.

#define TCCR_CR0_I_Msk   (1 << 2)

Definition at line 329 of file LPC2xxx.h.

#define TCCR_CR0_R_Msk   (1 << 0)

Definition at line 327 of file LPC2xxx.h.

#define TCCR_CR1_F_Msk   (1 << 4)

Definition at line 331 of file LPC2xxx.h.

#define TCCR_CR1_I_Msk   (1 << 5)

Definition at line 332 of file LPC2xxx.h.

#define TCCR_CR1_R_Msk   (1 << 3)

Definition at line 330 of file LPC2xxx.h.

#define TCCR_CR2_F_Msk   (1 << 7)

Definition at line 334 of file LPC2xxx.h.

#define TCCR_CR2_I_Msk   (1 << 8)

Definition at line 335 of file LPC2xxx.h.

#define TCCR_CR2_R_Msk   (1 << 6)

Definition at line 333 of file LPC2xxx.h.

#define TCCR_CR3_F_Msk   (1 << 10)

Definition at line 337 of file LPC2xxx.h.

#define TCCR_CR3_I_Msk   (1 << 11)

Definition at line 338 of file LPC2xxx.h.

#define TCCR_CR3_R_Msk   (1 << 9)

Definition at line 336 of file LPC2xxx.h.

#define TCR_ENABLE_Msk   (1 << 0)

Definition at line 309 of file LPC2xxx.h.

#define TCR_RESET_Msk   (1 << 1)

Definition at line 310 of file LPC2xxx.h.

#define TIR_CR0I_Msk   (1 << 4)

Definition at line 293 of file LPC2xxx.h.

#define TIR_CR1I_Msk   (1 << 5)

Definition at line 294 of file LPC2xxx.h.

#define TIR_CR2I_Msk   (1 << 6)

Definition at line 295 of file LPC2xxx.h.

#define TIR_CR3I_Msk   (1 << 7)

Definition at line 296 of file LPC2xxx.h.

#define TIR_MR0I_Msk   (1 << 0)

Definition at line 289 of file LPC2xxx.h.

#define TIR_MR1I_Msk   (1 << 1)

Definition at line 290 of file LPC2xxx.h.

#define TIR_MR2I_Msk   (1 << 2)

Definition at line 291 of file LPC2xxx.h.

#define TIR_MR3I_Msk   (1 << 3)

Definition at line 292 of file LPC2xxx.h.

#define TMCR_MR0_I_Msk   (1 << 0)

Definition at line 313 of file LPC2xxx.h.

#define TMCR_MR0_R_Msk   (1 << 1)

Definition at line 314 of file LPC2xxx.h.

#define TMCR_MR0_S_Msk   (1 << 2)

Definition at line 315 of file LPC2xxx.h.

#define TMCR_MR1_I_Msk   (1 << 3)

Definition at line 316 of file LPC2xxx.h.

#define TMCR_MR1_R_Msk   (1 << 4)

Definition at line 317 of file LPC2xxx.h.

#define TMCR_MR1_S_Msk   (1 << 5)

Definition at line 318 of file LPC2xxx.h.

#define TMCR_MR2_I_Msk   (1 << 6)

Definition at line 319 of file LPC2xxx.h.

#define TMCR_MR2_R_Msk   (1 << 7)

Definition at line 320 of file LPC2xxx.h.

#define TMCR_MR2_S_Msk   (1 << 8)

Definition at line 321 of file LPC2xxx.h.

#define TMCR_MR3_I_Msk   (1 << 9)

Definition at line 322 of file LPC2xxx.h.

#define TMCR_MR3_R_Msk   (1 << 10)

Definition at line 323 of file LPC2xxx.h.

#define TMCR_MR3_S_Msk   (1 << 11)

Definition at line 324 of file LPC2xxx.h.

#define VIC   ((VIC_TypeDef *) VIC_BASE )
#define VIC_MAX_IRQ_NUMBER   (VIC_SIZE-1)

Definition at line 182 of file LPC2xxx.h.

Referenced by SystemVIC_Init(), and SystemVIC_SetISR().

#define VIC_SIZE   16

Definition at line 148 of file LPC2xxx.h.

Referenced by SystemVIC_SetISR().