CMSIS2000  0.0.7
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bsp_board_olimex_lpc_2478_stk.h
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1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 #ifndef BSP_BOARD_DEF_H /*BSP_BOARD_DEF_H must be in every borad_def file*/
33 #define BSP_BOARD_DEF_H 1
34 #ifndef bsp_board_olimex_lpc_2478_stk /*bsp_board_EA_v1_1 must be in every borad_def file*/
35  #define bsp_board_olimex_lpc_2478_stk 1
36 #endif
37 /*-----------i_ is the i_DENTIFICATION DEFENITIONS --------------------------*/
38 #define i_ARCH ARM7
39 
40 #define i_MCU_FAMILY LPC2xxx
41 
42 #define i_MCU_MODEL 2478
43 
44 #define i_BOARD olimex_lpc_2478_stk
45 
46 #define i_VENDOR olimex
47 
48 #define i_VERSION 0x01000B /* REVISION B version 1*/
49 /*---------DEFINES THAT PERIPHERIAL DEVICES BOARD HAS ------------------------*/
50 #define BSP_BOARD_HAS_ETHERNET 1
51 #define BSP_BOARD_HAS_UART0 1
52 //#define BSP_BOARD_HAS_UART1 0
53 //#define BSP_BOARD_HAS_UART2 0
54 #define BSP_BOARD_HAS_CAN 1
55 #define BSP_BOARD_HAS_USB 1
56 #define BSP_BOARD_HAS_USB_HOST 2 /**< board has USB HOST on USB2*/
57 #define BSP_BOARD_HAS_USB_OTG 0 /**< board has OTG USB on USB1*/
58 #define BSP_BOARD_HAS_USB_DEVICE 1 /**< board has USB DEVICE on USB1*/
59 
60 #ifndef BSP_USB_MODE_DEFINED
61 #define BSP_USB_MODE_DEFINED \
62  (TYPE_DEVICE_PORT1_SOFT_CONNECT|TYPE_USB_PORT1_LED| \
63  TYPE_HOST_PORT2|TYPE_USB_PORT2_LED|TYPE_HOST_PORT2_POWER_EN)
64 
65 #endif
66 
67 #define BSP_BOARD_HAS_SDRAM 64 /*64MB SDRAM */
68 
69 #define BSP_BOARD_HAS_SPI 1
70 #define BSP_BOARD_HAS_SPI_VS1002D 1
71 #define BSP_BOARD_HAS_PS2 1
72 
73 #define BSP_BOARD_HAS_SD 1
74 #define BSP_BOARD_HAS_MMC 1
75 /*--------VALUES FOR system_LPC2xxx ----------------------------------------*/
76 #define LPC2xxx_VIC_SETUP 1
77 #define LPC2xxx_CLOCK_SETUP 1
78 #define LPC2xxx_PLL_SETUP 1
79 
80 #define XTAL_HZ 12000000UL
81  /* there is three clock soursec in lpc2xxx
82  and table here describe sourses and frequency constants.
83  CLKSRCSEL_IRC 0 IRC_OSC_HZ
84  CLKSRCSEL_XTAL 1 XTAL_HZ
85  CLKSRCSEL_RTC 2 RTC_CLK_HZ
86  */
87  /* select extermal oscillator, as the PLL clock source */
88 #define CLKSRCSEL_Val CLKSRCSEL_XTAL
89 
90 /* Fcck = 48Mhz, Fosc = 288Mhz, and USB 48Mhz */
91 /*Fcck = 2 * (PLL_MValue + 1) * F_OSC_HZ)/(PLL_NValue + 1) /(CCLKCFG_Val + 1))
92  Fcck = 2 * 12 * 12 = 288Mhz
93  Fosc = Fcck / (CCLKCFG_Val + 1) = 57.6Mhz --> useful for UART 57600 baud and etc.
94  FUSB = Fcck / (USBCLKDivValue + 1) = 48Mhz
95 */
96 #define PLL_MValue 11
97 #define PLL_NValue 0
98 #define CCLKCFG_Val 5
99 #define USBCLKCFG_Val 5
100 
101 /* example 2
102  Fcck = 2 * 20 * 12 = 480Mhz
103  Fosc = Fcck / (7 + 1) = 60.0Mhz
104  FUSB = Fcck / (9 + 1) = 48.0Mhz
105 
106 #define PLL_MValue 19
107 #define PLL_NValue 0
108 #define CCLKCFG_Val 7
109 #define USBCLKDivValue 9
110 */
111 
112 /*-----------Peripheral clock selsection -------------------------------------*/
113 /* let watchdog be at normal freq at CCLK/4 but let timer be at CCLK/1 */
114 #ifndef PCLKSEL0_Val
115  #define PCLKSEL0_Val (LPC2XXX_PCLK_V(WDT,4) | LPC2XXX_PCLK_V(TIMER0,1))
116 #endif
117 /* let BAT_RAM and SYSCON be at normal freq at CCLK/4 */
118 #ifndef PCLKSEL1_Val
119  #define PCLKSEL1_Val (LPC2XXX_PCLK_V(BAT_RAM,4) | LPC2XXX_PCLK_V(SYSCON,4))
120 #endif
121 
122 
123 #define LPC2xxx_FLASH_SETUP 1 /**< Enabling MAM*/
124  /* Enabling MAM and setting number of clocks
125  used for Flash memory fetch (4 cclks in this case) */
126 #define MAMCR_Val LPC_SC_MAM_MODE_FULL
127 
128 
129 #define LPC2xxx_SDRAM_SETUP BSP_BOARD_HAS_SDRAM
130 /*--------END OF VALUES FOR system_LPC2xxx ---------------------------------*/
131 /*----------------------------------------------------------------------------*/
132 /* SPI CHIP SELECT CHIP NUMBRES */
133 #define CS_VS1002D 1
134 
135 #define P0_20_TP_CS /* no need to chip select*/
136 
137 #define port_spi_chip_select_init() /* no need to chip select*/
138 
139 
140 //void port_spi_chip_select
141 #define port_spi_chip_select(chip_num) /* no need to chip select*/
142 
143 
144 #define port_spi_chip_disselect(chip_num) /* no need to chip select*/
145 
146 /*----------------------------------------------------------------------------*/
147 
148 #endif /*BSP_BOARD_DEF_H*/