CMSIS2000  0.0.7
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bsp_board_olimex_lpc_1766_stk.h
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1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 
33 #ifndef BSP_BOARD_DEF_H /*BSP_BOARD_DEF_H must be in every borad_def file*/
34 #define BSP_BOARD_DEF_H 1
35 /**
36  * \defgroup xg_bsp_board_def_olimex_lpc_1766_stk Olimex LPC1766-STK board
37  * \ingroup xg_bsp_LPC17xx
38  * @{
39  *
40  *\~russian
41  * Описание платы LPC1766-STK
42  *
43  * Плата LPC1766-STK -- отладочная плата от OLIMEX
44  *\~english
45  * LPC1766-STK board definition
46  *
47  * LPC1766-STK is the board from OLIMEX
48  *
49  *\~ https://www.olimex.com/Products/ARM/NXP/LPC1766-STK/
50  */
51 #ifndef bsp_board_olimex_lpc_1766_stk /*bsp_board_brd_name must be in every board_def file*/
52  #define bsp_board_olimex_lpc_1766_stk 1
53 #endif
54 /*-----------i_ is the i_DENTIFICATION DEFENITIONS --------------------------*/
55 #define i_ARCH CM3
56 
57 #define i_MCU_FAMILY LPC17xx
58 
59 #define i_MCU_MODEL 1766
60 
61 #define i_BOARD olimex_lpc_1766_stk
62 
63 #define i_VENDOR olimex
64 
65 #define i_VERSION 0x01000B /* REVISION B version 1*/
66 /*---------DEFINES THAT PERIPHERIAL DEVICES BOARD HAS ------------------------*/
67 #define BSP_BOARD_HAS_ETHERNET 1
68 #define BSP_BOARD_HAS_UART0 1
69 //#define BSP_BOARD_HAS_UART1 0
70 //#define BSP_BOARD_HAS_UART2 0
71 #define BSP_BOARD_HAS_CAN 1
72 #define BSP_BOARD_HAS_USB 1
73 #define BSP_BOARD_HAS_USB_HOST 2 /**< board has USB HOST on USB2*/
74 #define BSP_BOARD_HAS_USB_DEVICE 1 /**< board has USB DEVICE on USB1*/
75 
76 #define BSP_BOARD_HAS_SDRAM 1
77 
78 #define BSP_BOARD_HAS_SPI 1
79 #define BSP_BOARD_HAS_SPI_VS1002D 1
80 #define BSP_BOARD_HAS_PS2 1
81 
82 #define BSP_BOARD_HAS_SD 1
83 #define BSP_BOARD_HAS_MMC 1
84 /*--------VALUES FOR system_LPC2xxx ----------------------------------------*/
85 #define LPC2xxx_VIC_SETUP 1
86 #define LPC2xxx_CLOCK_SETUP 1
87 #define LPC2xxx_PLL_SETUP 1
88 
89 #define XTAL_HZ 12000000UL
90  /* there is three clock soursec in lpc2xxx
91  and table here describe sourses and frequency constants.
92  CLKSRCSEL_IRC 0 IRC_OSC_HZ
93  CLKSRCSEL_XTAL 1 XTAL_HZ
94  CLKSRCSEL_RTC 2 RTC_CLK_HZ
95  */
96  /* select extermal oscillator, as the PLL clock source */
97 #define CLKSRCSEL_Val 1/*CLKSRCSEL_XTAL*/
98 
99 /* Fcck = 48Mhz, Fosc = 288Mhz, and USB 48Mhz */
100 /*Fcck = 2 * (PLL_MValue + 1) * F_OSC_HZ)/(PLL_NValue + 1) /(CCLKCFG_Val + 1))
101  Fcck = 2 * 12 * 12 = 288Mhz
102  Fosc = Fcck / (CCLKCFG_Val + 1) = 57.6Mhz --> useful for UART 57600 baud and etc.
103  FUSB = Fcck / (USBCLKDivValue + 1) = 48Mhz
104 */
105 #define PLL_MValue 11
106 #define PLL_NValue 0
107 #define CCLKCFG_Val 5
108 #define USBCLKCFG_Val 5
109 
110 /* example 2
111  Fcck = 2 * 20 * 12 = 480Mhz
112  Fosc = Fcck / (7 + 1) = 60.0Mhz
113  FUSB = Fcck / (9 + 1) = 48.0Mhz
114 
115 #define PLL_MValue 19
116 #define PLL_NValue 0
117 #define CCLKCFG_Val 7
118 #define USBCLKDivValue 9
119 */
120 
121 /*-----------Peripheral clock selsection -------------------------------------*/
122 /* let watchdog be at normal freq at CCLK/4 but let timer be at CCLK/1 */
123 //#ifndef PCLKSEL0_Val
124 // #define PCLKSEL0_Val (LPC2XXX_PCLK_V(WDT,4) | LPC2XXX_PCLK_V(TIMER0,1))
125 //#endif
126 /* let BAT_RAM and SYSCON be at normal freq at CCLK/4 */
127 //#ifndef PCLKSEL1_Val
128 // #define PCLKSEL1_Val (LPC2XXX_PCLK_V(BAT_RAM,4) | LPC2XXX_PCLK_V(SYSCON,4))
129 //#endif
130 
131 
132 #define LPC2xxx_FLASH_SETUP 1 /**< Enabling MAM*/
133  /* Enabling MAM and setting number of clocks
134  used for Flash memory fetch (4 cclks in this case) */
135 #define MAMCR_Val LPC_SC_MAM_MODE_FULL
136 
137 
138 #define LPC2xxx_SDRAM_SETUP BSP_BOARD_HAS_SDRAM
139 /*--------END OF VALUES FOR system_LPC2xxx ---------------------------------*/
140 /*----------------------------------------------------------------------------*/
141 /* SPI CHIP SELECT CHIP NUMBRES */
142 #define CS_VS1002D 1
143 
144 #define P0_20_TP_CS /* no need to chip select*/
145 
146 #define port_spi_chip_select_init() /* no need to chip select*/
147 
148 
149 //void port_spi_chip_select
150 #define port_spi_chip_select(chip_num) /* no need to chip select*/
151 
152 
153 #define port_spi_chip_disselect(chip_num) /* no need to chip select*/
154 
155 /*----------------------------------------------------------------------------*/
156 
157 #endif /*BSP_BOARD_DEF_H*/