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core_cmInstr.h
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1 /**************************************************************************//**
2  * @file core_cmInstr.h
3  * @brief CMSIS Cortex-M Core Instruction Access Header File
4  * @version V3.02
5  * @date 08. May 2012
6  *
7  * @note
8  * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
9  *
10  * @par
11  * ARM Limited (ARM) is supplying this software for use with Cortex-M
12  * processor based microcontrollers. This file can be freely distributed
13  * within development tools that are supporting such ARM based processors.
14  *
15  * @par
16  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19  * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
20  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21  *
22  ******************************************************************************/
23 
24 #ifndef __CORE_CMINSTR_H
25 #define __CORE_CMINSTR_H
26 
27 
28 /* ########################## Core Instruction Access ######################### */
29 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
30  Access to dedicated instructions
31  @{
32 */
33 
34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
35 /* ARM armcc specific functions */
36 
37 #if (__ARMCC_VERSION < 400677)
38  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
39 #endif
40 
41 
42 /** \brief No Operation
43 
44  No Operation does nothing. This instruction can be used for code alignment purposes.
45  */
46 #define __NOP __nop
47 
48 
49 /** \brief Wait For Interrupt
50 
51  Wait For Interrupt is a hint instruction that suspends execution
52  until one of a number of events occurs.
53  */
54 #define __WFI __wfi
55 
56 
57 /** \brief Wait For Event
58 
59  Wait For Event is a hint instruction that permits the processor to enter
60  a low-power state until one of a number of events occurs.
61  */
62 #define __WFE __wfe
63 
64 
65 /** \brief Send Event
66 
67  Send Event is a hint instruction. It causes an event to be signaled to the CPU.
68  */
69 #define __SEV __sev
70 
71 
72 /** \brief Instruction Synchronization Barrier
73 
74  Instruction Synchronization Barrier flushes the pipeline in the processor,
75  so that all instructions following the ISB are fetched from cache or
76  memory, after the instruction has been completed.
77  */
78 #define __ISB() __isb(0xF)
79 
80 
81 /** \brief Data Synchronization Barrier
82 
83  This function acts as a special kind of Data Memory Barrier.
84  It completes when all explicit memory accesses before this instruction complete.
85  */
86 #define __DSB() __dsb(0xF)
87 
88 
89 /** \brief Data Memory Barrier
90 
91  This function ensures the apparent order of the explicit memory operations before
92  and after the instruction, without ensuring their completion.
93  */
94 #define __DMB() __dmb(0xF)
95 
96 
97 /** \brief Reverse byte order (32 bit)
98 
99  This function reverses the byte order in integer value.
100 
101  \param [in] value Value to reverse
102  \return Reversed value
103  */
104 #define __REV __rev
105 
106 
107 /** \brief Reverse byte order (16 bit)
108 
109  This function reverses the byte order in two unsigned short values.
110 
111  \param [in] value Value to reverse
112  \return Reversed value
113  */
114 #ifndef __NO_EMBEDDED_ASM
115 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
116 {
117  rev16 r0, r0
118  bx lr
119 }
120 #endif
121 
122 /** \brief Reverse byte order in signed short value
123 
124  This function reverses the byte order in a signed short value with sign extension to integer.
125 
126  \param [in] value Value to reverse
127  \return Reversed value
128  */
129 #ifndef __NO_EMBEDDED_ASM
130 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
131 {
132  revsh r0, r0
133  bx lr
134 }
135 #endif
136 
137 
138 /** \brief Rotate Right in unsigned value (32 bit)
139 
140  This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
141 
142  \param [in] value Value to rotate
143  \param [in] value Number of Bits to rotate
144  \return Rotated value
145  */
146 #define __ROR __ror
147 
148 
149 #if (__CORTEX_M >= 0x03)
150 
151 /** \brief Reverse bit order of value
152 
153  This function reverses the bit order of the given value.
154 
155  \param [in] value Value to reverse
156  \return Reversed value
157  */
158 #define __RBIT __rbit
159 
160 
161 /** \brief LDR Exclusive (8 bit)
162 
163  This function performs a exclusive LDR command for 8 bit value.
164 
165  \param [in] ptr Pointer to data
166  \return value of type uint8_t at (*ptr)
167  */
168 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
169 
170 
171 /** \brief LDR Exclusive (16 bit)
172 
173  This function performs a exclusive LDR command for 16 bit values.
174 
175  \param [in] ptr Pointer to data
176  \return value of type uint16_t at (*ptr)
177  */
178 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
179 
180 
181 /** \brief LDR Exclusive (32 bit)
182 
183  This function performs a exclusive LDR command for 32 bit values.
184 
185  \param [in] ptr Pointer to data
186  \return value of type uint32_t at (*ptr)
187  */
188 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
189 
190 
191 /** \brief STR Exclusive (8 bit)
192 
193  This function performs a exclusive STR command for 8 bit values.
194 
195  \param [in] value Value to store
196  \param [in] ptr Pointer to location
197  \return 0 Function succeeded
198  \return 1 Function failed
199  */
200 #define __STREXB(value, ptr) __strex(value, ptr)
201 
202 
203 /** \brief STR Exclusive (16 bit)
204 
205  This function performs a exclusive STR command for 16 bit values.
206 
207  \param [in] value Value to store
208  \param [in] ptr Pointer to location
209  \return 0 Function succeeded
210  \return 1 Function failed
211  */
212 #define __STREXH(value, ptr) __strex(value, ptr)
213 
214 
215 /** \brief STR Exclusive (32 bit)
216 
217  This function performs a exclusive STR command for 32 bit values.
218 
219  \param [in] value Value to store
220  \param [in] ptr Pointer to location
221  \return 0 Function succeeded
222  \return 1 Function failed
223  */
224 #define __STREXW(value, ptr) __strex(value, ptr)
225 
226 
227 /** \brief Remove the exclusive lock
228 
229  This function removes the exclusive lock which is created by LDREX.
230 
231  */
232 #define __CLREX __clrex
233 
234 
235 /** \brief Signed Saturate
236 
237  This function saturates a signed value.
238 
239  \param [in] value Value to be saturated
240  \param [in] sat Bit position to saturate to (1..32)
241  \return Saturated value
242  */
243 #define __SSAT __ssat
244 
245 
246 /** \brief Unsigned Saturate
247 
248  This function saturates an unsigned value.
249 
250  \param [in] value Value to be saturated
251  \param [in] sat Bit position to saturate to (0..31)
252  \return Saturated value
253  */
254 #define __USAT __usat
255 
256 
257 /** \brief Count leading zeros
258 
259  This function counts the number of leading zeros of a data value.
260 
261  \param [in] value Value to count the leading zeros
262  \return number of leading zeros in value
263  */
264 #define __CLZ __clz
265 
266 #endif /* (__CORTEX_M >= 0x03) */
267 
268 
269 
270 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
271 /* IAR iccarm specific functions */
272 
273 #include <cmsis_iar.h>
274 
275 
276 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
277 /* TI CCS specific functions */
278 
279 #include <cmsis_ccs.h>
280 
281 
282 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
283 /* GNU gcc specific functions */
284 
285 /** \brief No Operation
286 
287  No Operation does nothing. This instruction can be used for code alignment purposes.
288  */
289 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
290 {
291  __ASM volatile ("nop");
292 }
293 
294 
295 /** \brief Wait For Interrupt
296 
297  Wait For Interrupt is a hint instruction that suspends execution
298  until one of a number of events occurs.
299  */
300 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
301 {
302  __ASM volatile ("wfi");
303 }
304 
305 
306 /** \brief Wait For Event
307 
308  Wait For Event is a hint instruction that permits the processor to enter
309  a low-power state until one of a number of events occurs.
310  */
311 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
312 {
313  __ASM volatile ("wfe");
314 }
315 
316 
317 /** \brief Send Event
318 
319  Send Event is a hint instruction. It causes an event to be signaled to the CPU.
320  */
321 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
322 {
323  __ASM volatile ("sev");
324 }
325 
326 
327 /** \brief Instruction Synchronization Barrier
328 
329  Instruction Synchronization Barrier flushes the pipeline in the processor,
330  so that all instructions following the ISB are fetched from cache or
331  memory, after the instruction has been completed.
332  */
333 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
334 {
335  __ASM volatile ("isb");
336 }
337 
338 
339 /** \brief Data Synchronization Barrier
340 
341  This function acts as a special kind of Data Memory Barrier.
342  It completes when all explicit memory accesses before this instruction complete.
343  */
344 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
345 {
346  __ASM volatile ("dsb");
347 }
348 
349 
350 /** \brief Data Memory Barrier
351 
352  This function ensures the apparent order of the explicit memory operations before
353  and after the instruction, without ensuring their completion.
354  */
355 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
356 {
357  __ASM volatile ("dmb");
358 }
359 
360 
361 /** \brief Reverse byte order (32 bit)
362 
363  This function reverses the byte order in integer value.
364 
365  \param [in] value Value to reverse
366  \return Reversed value
367  */
368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
369 {
370  uint32_t result;
371 
372  __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
373  return(result);
374 }
375 
376 
377 /** \brief Reverse byte order (16 bit)
378 
379  This function reverses the byte order in two unsigned short values.
380 
381  \param [in] value Value to reverse
382  \return Reversed value
383  */
384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
385 {
386  uint32_t result;
387 
388  __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
389  return(result);
390 }
391 
392 
393 /** \brief Reverse byte order in signed short value
394 
395  This function reverses the byte order in a signed short value with sign extension to integer.
396 
397  \param [in] value Value to reverse
398  \return Reversed value
399  */
400 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
401 {
402  uint32_t result;
403 
404  __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
405  return(result);
406 }
407 
408 
409 /** \brief Rotate Right in unsigned value (32 bit)
410 
411  This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
412 
413  \param [in] value Value to rotate
414  \param [in] value Number of Bits to rotate
415  \return Rotated value
416  */
417 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
418 {
419 
420  __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
421  return(op1);
422 }
423 
424 
425 #if (__CORTEX_M >= 0x03)
426 
427 /** \brief Reverse bit order of value
428 
429  This function reverses the bit order of the given value.
430 
431  \param [in] value Value to reverse
432  \return Reversed value
433  */
434 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
435 {
436  uint32_t result;
437 
438  __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
439  return(result);
440 }
441 
442 
443 /** \brief LDR Exclusive (8 bit)
444 
445  This function performs a exclusive LDR command for 8 bit value.
446 
447  \param [in] ptr Pointer to data
448  \return value of type uint8_t at (*ptr)
449  */
450 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
451 {
452  uint8_t result;
453 
454  __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
455  return(result);
456 }
457 
458 
459 /** \brief LDR Exclusive (16 bit)
460 
461  This function performs a exclusive LDR command for 16 bit values.
462 
463  \param [in] ptr Pointer to data
464  \return value of type uint16_t at (*ptr)
465  */
466 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
467 {
468  uint16_t result;
469 
470  __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
471  return(result);
472 }
473 
474 
475 /** \brief LDR Exclusive (32 bit)
476 
477  This function performs a exclusive LDR command for 32 bit values.
478 
479  \param [in] ptr Pointer to data
480  \return value of type uint32_t at (*ptr)
481  */
482 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
483 {
484  uint32_t result;
485 
486  __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
487  return(result);
488 }
489 
490 
491 /** \brief STR Exclusive (8 bit)
492 
493  This function performs a exclusive STR command for 8 bit values.
494 
495  \param [in] value Value to store
496  \param [in] ptr Pointer to location
497  \return 0 Function succeeded
498  \return 1 Function failed
499  */
500 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
501 {
502  uint32_t result;
503 
504  __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
505  return(result);
506 }
507 
508 
509 /** \brief STR Exclusive (16 bit)
510 
511  This function performs a exclusive STR command for 16 bit values.
512 
513  \param [in] value Value to store
514  \param [in] ptr Pointer to location
515  \return 0 Function succeeded
516  \return 1 Function failed
517  */
518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
519 {
520  uint32_t result;
521 
522  __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
523  return(result);
524 }
525 
526 
527 /** \brief STR Exclusive (32 bit)
528 
529  This function performs a exclusive STR command for 32 bit values.
530 
531  \param [in] value Value to store
532  \param [in] ptr Pointer to location
533  \return 0 Function succeeded
534  \return 1 Function failed
535  */
536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
537 {
538  uint32_t result;
539 
540  __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
541  return(result);
542 }
543 
544 
545 /** \brief Remove the exclusive lock
546 
547  This function removes the exclusive lock which is created by LDREX.
548 
549  */
550 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
551 {
552  __ASM volatile ("clrex");
553 }
554 
555 
556 /** \brief Signed Saturate
557 
558  This function saturates a signed value.
559 
560  \param [in] value Value to be saturated
561  \param [in] sat Bit position to saturate to (1..32)
562  \return Saturated value
563  */
564 #define __SSAT(ARG1,ARG2) \
565 ({ \
566  uint32_t __RES, __ARG1 = (ARG1); \
567  __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
568  __RES; \
569  })
570 
571 
572 /** \brief Unsigned Saturate
573 
574  This function saturates an unsigned value.
575 
576  \param [in] value Value to be saturated
577  \param [in] sat Bit position to saturate to (0..31)
578  \return Saturated value
579  */
580 #define __USAT(ARG1,ARG2) \
581 ({ \
582  uint32_t __RES, __ARG1 = (ARG1); \
583  __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
584  __RES; \
585  })
586 
587 
588 /** \brief Count leading zeros
589 
590  This function counts the number of leading zeros of a data value.
591 
592  \param [in] value Value to count the leading zeros
593  \return number of leading zeros in value
594  */
595 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
596 {
597  uint8_t result;
598 
599  __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
600  return(result);
601 }
602 
603 #endif /* (__CORTEX_M >= 0x03) */
604 
605 
606 
607 
608 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
609 /* TASKING carm specific functions */
610 
611 /*
612  * The CMSIS functions have been implemented as intrinsics in the compiler.
613  * Please use "carm -?i" to get an up to date list of all intrinsics,
614  * Including the CMSIS ones.
615  */
616 
617 #endif
618 
619 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
620 
621 #endif /* __CORE_CMINSTR_H */