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core_cm3.c
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1 /**************************************************************************//**
2  * @file core_cm3.c
3  * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
4  * @version V2.00
5  * @date 13. September 2010
6  *
7  * @note
8  * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
9  *
10  * @par
11  * ARM Limited (ARM) is supplying this software for use with Cortex-M
12  * processor based microcontrollers. This file can be freely distributed
13  * within development tools that are supporting such ARM based processors.
14  *
15  * @par
16  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19  * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
20  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21  *
22  ******************************************************************************/
23 
24 #include <stdint.h>
25 
26 /* define compiler specific symbols */
27 #if defined ( __CC_ARM )
28  #define __ASM __asm /*!< asm keyword for ARM Compiler */
29  #define __INLINE __inline /*!< inline keyword for ARM Compiler */
30 
31 #elif defined ( __ICCARM__ )
32  #define __ASM __asm /*!< asm keyword for IAR Compiler */
33  #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
34 
35 #elif defined ( __GNUC__ )
36  #define __ASM __asm /*!< asm keyword for GNU Compiler */
37  #define __INLINE inline /*!< inline keyword for GNU Compiler */
38 
39 #elif defined ( __TASKING__ )
40  #define __ASM __asm /*!< asm keyword for TASKING Compiler */
41  #define __INLINE inline /*!< inline keyword for TASKING Compiler */
42 
43 #endif
44 
45 
46 /* ########################## Core Instruction Access ######################### */
47 
48 #if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/
49 
50 /** \brief Reverse byte order (16 bit)
51 
52  This function reverses the byte order in two unsigned short values.
53 
54  \param [in] value Value to reverse
55  \return Reversed value
56  */
57 #if (__ARMCC_VERSION < 400677)
58 __ASM uint32_t __REV16(uint32_t value)
59 {
60  rev16 r0, r0
61  bx lr
62 }
63 #endif /* __ARMCC_VERSION */
64 
65 
66 /** \brief Reverse byte order in signed short value
67 
68  This function reverses the byte order in a signed short value with sign extension to integer.
69 
70  \param [in] value Value to reverse
71  \return Reversed value
72  */
73 #if (__ARMCC_VERSION < 400677)
74 __ASM int32_t __REVSH(int32_t value)
75 {
76  revsh r0, r0
77  bx lr
78 }
79 #endif /* __ARMCC_VERSION */
80 
81 
82 /** \brief Remove the exclusive lock
83 
84  This function removes the exclusive lock which is created by LDREX.
85 
86  */
87 #if (__ARMCC_VERSION < 400000)
88 __ASM void __CLREX(void)
89 {
90  clrex
91 }
92 #endif /* __ARMCC_VERSION */
93 
94 
95 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
96 /* obsolete */
97 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
98 /* obsolete */
99 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
100 /* obsolete */
101 #endif
102 
103 
104 /* ########################### Core Function Access ########################### */
105 
106 #if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/
107 
108 /** \brief Get Control Register
109 
110  This function returns the content of the Control Register.
111 
112  \return Control Register value
113  */
114 #if (__ARMCC_VERSION < 400000)
115 __ASM uint32_t __get_CONTROL(void)
116 {
117  mrs r0, control
118  bx lr
119 }
120 #endif /* __ARMCC_VERSION */
121 
122 
123 /** \brief Set Control Register
124 
125  This function writes the given value to the Control Register.
126 
127  \param [in] control Control Register value to set
128  */
129 #if (__ARMCC_VERSION < 400000)
130 __ASM void __set_CONTROL(uint32_t control)
131 {
132  msr control, r0
133  bx lr
134 }
135 #endif /* __ARMCC_VERSION */
136 
137 
138 /** \brief Get ISPR Register
139 
140  This function returns the content of the ISPR Register.
141 
142  \return ISPR Register value
143  */
144 #if (__ARMCC_VERSION < 400000)
145 __ASM uint32_t __get_IPSR(void)
146 {
147  mrs r0, ipsr
148  bx lr
149 }
150 #endif /* __ARMCC_VERSION */
151 
152 
153 /** \brief Get APSR Register
154 
155  This function returns the content of the APSR Register.
156 
157  \return APSR Register value
158  */
159 #if (__ARMCC_VERSION < 400000)
160 __ASM uint32_t __get_APSR(void)
161 {
162  mrs r0, apsr
163  bx lr
164 }
165 #endif /* __ARMCC_VERSION */
166 
167 
168 /** \brief Get xPSR Register
169 
170  This function returns the content of the xPSR Register.
171 
172  \return xPSR Register value
173  */
174 #if (__ARMCC_VERSION < 400000)
175 __ASM uint32_t __get_xPSR(void)
176 {
177  mrs r0, xpsr
178  bx lr
179 }
180 #endif /* __ARMCC_VERSION */
181 
182 
183 /** \brief Get Process Stack Pointer
184 
185  This function returns the current value of the Process Stack Pointer (PSP).
186 
187  \return PSP Register value
188  */
189 #if (__ARMCC_VERSION < 400000)
190 __ASM uint32_t __get_PSP(void)
191 {
192  mrs r0, psp
193  bx lr
194 }
195 #endif /* __ARMCC_VERSION */
196 
197 
198 /** \brief Set Process Stack Pointer
199 
200  This function assigns the given value to the Process Stack Pointer (PSP).
201 
202  \param [in] topOfProcStack Process Stack Pointer value to set
203  */
204 #if (__ARMCC_VERSION < 400000)
205 __ASM void __set_PSP(uint32_t topOfProcStack)
206 {
207  msr psp, r0
208  bx lr
209 }
210 #endif /* __ARMCC_VERSION */
211 
212 
213 /** \brief Get Main Stack Pointer
214 
215  This function returns the current value of the Main Stack Pointer (MSP).
216 
217  \return MSP Register value
218  */
219 #if (__ARMCC_VERSION < 400000)
220 __ASM uint32_t __get_MSP(void)
221 {
222  mrs r0, msp
223  bx lr
224 }
225 #endif /* __ARMCC_VERSION */
226 
227 
228 /** \brief Set Main Stack Pointer
229 
230  This function assigns the given value to the Main Stack Pointer (MSP).
231 
232  \param [in] topOfMainStack Main Stack Pointer value to set
233  */
234 #if (__ARMCC_VERSION < 400000)
235 __ASM void __set_MSP(uint32_t mainStackPointer)
236 {
237  msr msp, r0
238  bx lr
239 }
240 #endif /* __ARMCC_VERSION */
241 
242 
243 /** \brief Get Base Priority
244 
245  This function returns the current value of the Base Priority register.
246 
247  \return Base Priority register value
248  */
249 #if (__ARMCC_VERSION < 400000)
250 __ASM uint32_t __get_BASEPRI(void)
251 {
252  mrs r0, basepri
253  bx lr
254 }
255 #endif /* __ARMCC_VERSION */
256 
257 
258 /** \brief Set Base Priority
259 
260  This function assigns the given value to the Base Priority register.
261 
262  \param [in] basePri Base Priority value to set
263  */
264 #if (__ARMCC_VERSION < 400000)
265 __ASM void __set_BASEPRI(uint32_t basePri)
266 {
267  msr basepri, r0
268  bx lr
269 }
270 #endif /* __ARMCC_VERSION */
271 
272 /** \brief Get Priority Mask
273 
274  This function returns the current state of the priority mask bit from the Priority Mask Register.
275 
276  \return Priority Mask value
277  */
278 #if (__ARMCC_VERSION < 400000)
279 __ASM uint32_t __get_PRIMASK(void)
280 {
281  mrs r0, primask
282  bx lr
283 }
284 #endif /* __ARMCC_VERSION */
285 
286 
287 /** \brief Set Priority Mask
288 
289  This function assigns the given value to the Priority Mask Register.
290 
291  \param [in] priMask Priority Mask
292  */
293 #if (__ARMCC_VERSION < 400000)
294 __ASM void __set_PRIMASK(uint32_t priMask)
295 {
296  msr primask, r0
297  bx lr
298 }
299 #endif /* __ARMCC_VERSION */
300 
301 
302 /** \brief Get Fault Mask
303 
304  This function returns the current value of the Fault Mask Register.
305 
306  \return Fault Mask value
307  */
308 #if (__ARMCC_VERSION < 400000)
309 __ASM uint32_t __get_FAULTMASK(void)
310 {
311  mrs r0, faultmask
312  bx lr
313 }
314 #endif /* __ARMCC_VERSION */
315 
316 
317 /** \brief Set the Fault Mask
318 
319  This function assigns the given value to the Fault Mask Register.
320 
321  \param [in] faultMask Fault Mask value value to set
322  */
323 #if (__ARMCC_VERSION < 400000)
324 __ASM void __set_FAULTMASK(uint32_t faultMask)
325 {
326  msr faultmask, r0
327  bx lr
328 }
329 #endif /* __ARMCC_VERSION */
330 
331 
332 
333 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
334 /* obsolete */
335 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
336 /* obsolete */
337 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
338 /* obsolete */
339 #endif