CMSIS2000  0.0.7
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core_7tdmi.h
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1 /*
2  * CMSIS2000
3  * CMSIS-like sources for LPC2xxx series MCUs
4  *
5  * (C) Copyright 2011-2012, Dmitriy Cherepanov, All Rights Reserved
6  *
7  * Version: 0.0.7
8  * Date of the Last Update: 2013-03-04
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to
12  * deal in the Software without restriction, including without limitation the
13  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
14  * sell copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26  * IN THE SOFTWARE.
27  *
28  * Do not be lasy! For the latest version see http://irtos.sourceforge.net .
29  *
30  *
31 #*/
32 #if defined ( __ICCARM__ )
33  #pragma system_include
34 #endif
35 
36 #ifdef __cplusplus
37  extern "C" {
38 #endif
39 
40 #ifndef __CORE_7TDMI_H_GENERIC
41 #define __CORE_7TDMI_H_GENERIC
42 
43 /** @addtogroup CMSIS_core_LintCinfiguration CMSIS Core Lint Configuration
44  List of Lint messages which will be suppressed and not shown:
45  - not yet checked
46  .
47  Note: To re-enable a Message, insert a space before 'lint' *
48 
49  */
50 
51 
52 /*******************************************************************************
53  * CMSIS definitions
54  ******************************************************************************/
55 /** @addtogroup CMSIS_core_definitions_LPC2xxx CMSIS Core Definitions for LPC2xxx
56  This file defines all structures and symbols for CMSIS core:
57  - CMSIS version number
58  - Cortex-M core
59  - Cortex-M core Revision Number
60  \ingroup LPC2xxx_System
61  @{
62  */
63 
64 /* CMSIS CM3 definitions */
65 #define __CM3_CMSIS_VERSION_MAIN (0x02) /*!< [31:16] CMSIS HAL main version */
66 #define __CM3_CMSIS_VERSION_SUB (0x00) /*!< [15:0] CMSIS HAL sub version */
67 #define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
68 
69 #define __CORTEX_M (-1) /*!< Cortex core*/
70 
71 #if defined ( __CC_ARM )
72  #define __ASM __asm /*!< asm keyword for ARM Compiler */
73  #define __INLINE __inline /*!< inline keyword for ARM Compiler */
74  #define __STATIC_INLINE static __inline
75 
76 #elif defined ( __ICCARM__ )
77  #define __ASM __asm /*!< asm keyword for IAR Compiler */
78  #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
79  #define __STATIC_INLINE static inline
80 
81 #elif defined ( __TMS470__ )
82  #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
83  #define __STATIC_INLINE static inline
84 
85 #elif defined ( __GNUC__ )
86  #define __ASM __asm /*!< asm keyword for GNU Compiler */
87  #define __INLINE inline /*!< inline keyword for GNU Compiler */
88  #define __STATIC_INLINE static inline
89 
90 #elif defined ( __TASKING__ )
91  #define __ASM __asm /*!< asm keyword for TASKING Compiler */
92  #define __INLINE inline /*!< inline keyword for TASKING Compiler */
93  #define __STATIC_INLINE static inline
94 
95 #endif
96 
97 #include <stdint.h> /*!< standard types definitions */
98 
99 #include "core_7tdmiInstr.h" /*!< Core Instruction Access */
100 #include "core_7tdmiFunc.h" /*!< Core Function Access */
101 #include "core_7tdmiInterrupt.h" /*!< exeptions and interrupt subroutines macroses */
102 
103 
104 
105 #endif /* __CORE_7TDMI_H_GENERIC */
106 
107 #ifndef __CMSIS_GENERIC
108 
109 //#define __CMSIS_GENERIC
110 
111 #ifndef __CORE_7TDMI_H_DEPENDANT
112 #define __CORE_7TDMI_H_DEPENDANT
113 
114 /* IO definitions (access restrictions to peripheral registers) */
115 #ifdef __cplusplus
116  #define __I volatile /*!< defines 'read only' permissions */
117 #else
118  #define __I volatile const /*!< defines 'read only' permissions */
119 #endif
120 #define __O volatile /*!< defines 'write only' permissions */
121 #define __IO volatile /*!< defines 'read / write' permissions */
122 
123 /*@} end of group CMSIS_core_definitions */
124 
125 /** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
126  */
127 typedef union
128 {
129  struct
130  {
131  uint32_t M:5; /*!< bit: 0.. 4 Mode number*/
132 
133  uint32_t T:1; /*!< bit: 5 Thumb bit */
134  uint32_t F:1; /*!< bit: 6 FIQ bit */
135  uint32_t I:1; /*!< bit: 7 Interrupt bit */
136 
137  uint32_t _reserved0:20; /*!< bit: 8..27 Reserved */
138  uint32_t V:1; /*!< bit: 28 Overflow condition code flag*/
139  uint32_t C:1; /*!< bit: 29 Carry condition code flag*/
140  uint32_t Z:1; /*!< bit: 30 Zero condition code flag*/
141  uint32_t N:1; /*!< bit: 31 Negative condition code flag*/
142  } b; /*!< Structure used for bit access*/
143  uint32_t w; /*!< Type used for word access*/
144 } CPSR_Type;
145 
146 #define CPSR_M_USR 0x10 /* Normal User Mode */
147 #define CPSR_M_FIQ 0x11 /* FIQ Processing Fast Interrupts Mode */
148 #define CPSR_M_IRQ 0x12 /* IRQ Processing Standard Interrupts Mode */
149 #define CPSR_M_SVC 0x13 /* Supervisor Processing Software Interrupts Mode */
150 #define CPSR_M_ABT 0x17 /* Abort Processing memory Faults Mode */
151 #define CPSR_M_UND 0x1B /* Undefined Processing Undefined Instructions Mode */
152 #define CPSR_M_SYS 0x1F /* System Running Priviledged Operating System Tasks Mode*/
153 
154 #endif /* __CORE_7TDMI_H_DEPENDANT */
155 
156 #endif /* __CMSIS_GENERIC */
157 
158 #ifdef __cplusplus
159 }
160 #endif